Datasheet

LCD_HSYNC
LCD_PCLK
(active mode)
LCD_D[15:0]
(active mode)
PPL
16
×
(1to1024)
HBP
(1to256
Line1forpassive
(1to256)
HFP
(1to64)
HSW
PPL
16
×
(1to1024)
Line1foractive
LCD_VSYNC
LCD_PCLK
(passive mode)
LCD_AC_ENB_CS
LCD_D[7:0]
(passive mode)
1,1
2,2
P,2P,1
2,1
1,2
10
11
9
7
4
5
1
2 3
VSW = 1
VFP =0
VBP =0
P,11,1
2,1
4
5
1
3
4
Line2forpassive
AM1808
www.ti.com SPRS653E –FEBRUARY 2010–REVISED MARCH 2014
Figure 6-64. LCD Raster-Mode Control Signal Deactivation
Copyright © 2010–2014, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 209
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