Datasheet

LCD_HSYNC
LCD_PCLK
(active mode)
LCD_D[15:0]
(active mode)
1,L P,L
2,L
PPL
16
×
(1to1024)
HBP
(1to256
LineL
(1to256)
HFP
(1to64)
HSW
PPL
16
×
(1to1024)
Line1(PassiveOnly)
LCD_VSYNC
LCD_PCLK
(passive mode)
LCD_AC_ENB_CS
LCD_D[7:0]
(passive mode)
1,L
2,1
P,1
P,L
2,L
1,1
10
11
8
6
4
4
5
5
1
2 3
1
2 3
VSW = 1
VFP =0
VBP =0
AM1808
SPRS653E –FEBRUARY 2010–REVISED MARCH 2014 www.ti.com
Figure 6-63. LCD Raster-Mode Control Signal Activation
208 Peripheral Information and Electrical Specifications Copyright © 2010–2014, Texas Instruments Incorporated
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