Datasheet

TMS320DM6467T
www.ti.com SPRS605C –JULY 2009–REVISED JUNE 2012
Table 4-3. DM6467T Default Module States
DEFAULT MODULE STATE
LPSC # MODULE NAME
[PSC Register MDSTATn.STATE]
0 ARM Enable
DSP C64x+ If DSPBOOT = 0 then, Enable and Module Local Reset is asserted
(MDSTATn.LRST = 0).
1
If DSPBOOT = 1 then, Enable and Module Local Reset is asserted
(MDSTATn.LRST = 1).
2 HDVICP0 SwRstDisable
3 HDVICP1 SwRstDisable
4 EDMACC SwRstDisable
5 EDMATC0 SwRstDisable
6 EDMATC1 SwRstDisable
7 EDMATC2 SwRstDisable
8 EDMATC3 SwRstDisable
9 USB2.0 SwRstDisable
10 ATA SwRstDisable
11 VLYNQ SwRstDisable
12 HPI SwRstDisable
13 PCI SwRstDisable
14 EMAC/MDIO SwRstDisable
15 VDCE SwRstDisable
16 – 17 Video Port
(1)
SwRstDisable
18 TSIF0 SwRstDisable
19 TSIF1 SwRstDisable
20 DDR2 Memory Contoller SwRstDisable
If BTMODE[3:0] ≠ 0100 and DSPBOOT = 0 then, SwRstDisable
21 EMIFA
If BTMODE[3:0] = 0100 or DSPBOOT = 1 then, Enable
22 McASP0 SwRstDisable
23 McASP1 SwRstDisable
24 CRGEN0 SwRstDisable
25 CRGEN1 SwRstDisable
26 UART0 SwRstDisable
27 UART1 SwRstDisable
28 UART2 SwRstDisable
29 PWM0 SwRstDisable
30 PWM1 SwRstDisable
31 I2C SwRstDisable
32 SPI SwRstDisable
33 GPIO SwRstDisable
34 TIMER0 SwRstDisable
35 TIMER1 SwRstDisable
36 – 44 Reserved Reserved
45 ARM INTC Enable
(1) The Video Port Module has a total of five clock inputs that can be controlled by the LPSC. One LPSC can support only a maximum of
four clocks; therefore, two LPSCs are assigned to the Video Port. Both Video Port LPSCs should be controlled together and should be
set to the same state.
Copyright © 2009–2012, Texas Instruments Incorporated Device Configurations 87
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