Datasheet

TMS320DM6467T
www.ti.com SPRS605C –JULY 2009–REVISED JUNE 2012
Table 3-5. BOOT Terminal Functions
SIGNAL
OTHER
(2)
TYPE
(1)
DESCRIPTION
(3)
NAME NO.
BOOT
ARM Boot Mode configuration bits. These pins are multiplexed between ARM boot mode and the Video Port Interface (VPIF). At reset, the
boot mode inputs BTMODE[3:0] are sampled to determine the ARM boot configuration. See below the boot modes set by these inputs. For
more details on the types of boot modes, see the Section 4.4.1, Boot Modes. After reset, these pins are Video port data outputs 3 through 0
(VP_DOUT[3:0]).
BTMODE[3:0] ARM Boot Mode
0000 Emulation Boot (PCIEN = 0)
0001 Reserved
HPI Boot (16-Bit width) (if PCIEN = 0)
VP_DOUT0/ IPD
0010 or
AB5 I/O/Z
BTMODE0 DV
DD33
PCI Boot without auto-initialization (if PCIEN = 1)
HPI Boot (32-Bit width) (if PCIEN = 0)
0011 or
PCI Boot with auto-initialization (if PCIEN = 1)
EMIFA Direct Boot (ROM/NOR) (PCIEN = 0) [error if PCIEN =
0100
1; defaults to UART0]
VP_DOUT1/ IPD
0101 Reserved
AC4 I/O/Z
BTMODE1 DV
DD33
0110 I2C Boot
0111 NAND Flash Boot (PCIEN = 0) [error if PCIEN = 1]
1000 UART0 Boot
1001 Reserved
VP_DOUT2/ IPD
Y8 I/O/Z
BTMODE2 DV
DD33
1010 Reserved
1011 Reserved
1100 - 1101 Reserved
VP_DOUT3/ IPD
AB6 I/O/Z 1110 SPI Boot
BTMODE3 DV
DD33
1111 Reserved
DEVICE CONTROL
EMIFA CS2 space data bus width. This pin is multiplexed between EMIFA control
and the VPIF. At reset, the input state is sampled to set the EMIFA data bus width
for the CS2 (boot) chip select region.
VP_DOUT4/ IPD
AA7 I/O/Z
CS2BW DV
DD33
For an 8-bit-wide EMIFA data bus, CS2BW = 0.
For a 16-bit-wide EMIFA data bus, CS2BW = 1.
After reset, this pin is video port data output 4 (VP_DOUT4).
PCI Enable. This pin is multiplexed between PCI Control and the VPIF. At reset, the
input state is sampled to enable/disable the PCI interface pin multiplexing. Note:
When PCI boot mode is not used, for proper device operation out of reset PCIEN
must be "0".
VP_DOUT5/ IPD
AC6 I/O/Z
PCIEN DV
DD33
0 = PCI pin function is disabled; EMIFA or HPI pin function enabled
1 = PCI pin function is enabled
After reset, this pin is video port data output 5 (VP_DOUT5).-
DSP boot source bit. This pin is multiplexed between DSP boot and the VPIF. At
reset, the input state is sampled to set the DSP boot source DSPBOOT.
VP_DOUT6/ IPD The DSP is booted by the ARM when DSPBOOT = 0.
AC5 I/O/Z
DSPBOOT DV
DD33
The DSP boots from EMIFA when DSPBOOT = 1 (and ARM HPI or PCI boot mode
is not selected).
After reset, this pin is video port data output 6 (VP_DOUT6).
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 4.8.1, Pullup/Pulldown Resistors.
(3) Specifies the operating I/O supply voltage for each signal
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