Datasheet

Table Of Contents

TMS320DM6467T

SPRS605C –JULY 2009–REVISED JUNE 2012

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7.20.2 ATA Peripheral Register Description(s)

Table 7-89 shows the ATA registers.

Table 7-89. ATA Register Memory Map

HEX ADDRESS RANGE ACRONYM REGISTER NAME

ATA Bus Master Interface DMA Engine Registers

0x01C6 6000 BMICP Primary IDE Channel DMA Control Register

0x01C6 6002 BMISP Primary IDE Channel DMA Status Register

0x01C6 6004 BMIDTP Primary IDE Channel DMA Descriptor Table Pointer Register

0x01C6 6008 - 0x01C6 603F – Reserved

ATA Configuration Registers

0x01C6 6040 IDETIMP Primary IDE Channel Timing Register

0x01C6 6042 - 0x01C6 6046 – Reserved

0x01C6 6047 IDESTAT IDE Controller Status Register

0x01C6 6048 UDMACTL Ultra-DMA Control Register

0x01C6 604A – Reserved

0x01C6 6050 MISCCTL Miscellaneous Control Register

0x01C6 6054 REGSTB Task File Register Strobe Timing Register

0x01C6 6058 REGRCVR Task File Register Recovery Timing Register

0x01C6 605C DATSTB Data Register Access PIO Strobe Timing Register

0x01C6 6060 DATRCVR Data Register Access PIO Recovery Timing Register

0x01C6 6064 DMASTB Multiword DMA Strobe Timing Register

0x01C6 6068 DMARCVR Multiword DMA Recovery Timing Register

0x01C6 606C UDMASTB Ultra-DMA Strobe Timing Register

0x01C6 6070 UDMATRP Ultra-DMA Ready-to-Pause Timing Register

0x01C6 6074 UDMATENV Ultra-DMA Timing Envelope Register

0x01C6 6078 IORDYTMP Primary I/O Ready Timer Configuration Register

0x01C6 607C - 0x01C6 67FF – Reserved

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