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Table Of Contents

TMS320DM6467T

www.ti.com

SPRS605C –JULY 2009–REVISED JUNE 2012

Table 7-51. TSIF1 Registers (continued)

HEX ADDRESS RANGE ACRONYM REGISTER NAME

0x01C1 343C BSP_STORE_ADDR BSP in store address register

0x01C1 3440 PCR_SENSE_CFG Program clock reference (PCR) sense configuration register

0x01C1 3444 PID0_FILT_CFG Packet Identifier (PID) 0 (PID0) filter configuration register

0x01C1 3448 PID1_FILT_CFG PID1 filter configuration register

0x01C1 344C PID2_FILT_CFG PID2 filter configuration register

0x01C1 3450 PID3_FILT_CFG PID3 filter configuration register

0x01C1 3454 PID4_FILT_CFG PID4 filter configuration register

0x01C1 3458 PID5_FILT_CFG PID5 filter configuration register

0x01C1 345C PID6_FILT_CFG PID6 filter configuration register

0x01C1 3460 BYPASS_CFG Bypass mode configuration register

0x01C1 3064 TX_ATS_INIT Transmit Arrival Time Stamp (ATS) initialization register

0x01C1 3468 TX_ATS_MON Transmit ATS monitor register

0x01C1 346C – Reserved

0x01C1 3470 RX_PKT_STAT Receive packet status register

0x01C1 3474 - 0x01C1 347F – Reserved

0x01C1 3480 STC_INIT_CTRL System Time Clock (STC) initialization control register

0x01C1 3484 STC_INIT_VAL STC initialization value register

0x01C1 3488 STC_INT0 STC interrupt entry 0 register

0x01C1 348C STC_INT1 STC interrupt entry 1 register

0x01C1 3490 STC_INT2 STC interrupt entry 2 register

0x01C1 3494 STC_INT3 STC interrupt entry 3 register

0x01C1 3498 STC_INT4 STC interrupt entry 4 register

0x01C1 349C STC_INT5 STC interrupt entry 5 register

0x01C1 34A0 STC_INT6 STC interrupt entry 6 register

0x01C1 34A4 STC_INT7 STC interrupt entry 7 register

0x01C1 34A8 - 0x01C1 34BF – Reserved

0x01C1 34C0 WRB_CTRL Write ring buffer channel control register

0x01C1 34C4 WRB0_STRT_ADDR Write ring buffer channel 0 start address register

0x01C1 34C8 WRB0_END_ADDR Write ring buffer channel 0 end address register

0x01C1 34CC WRB0_RDPTR Write ring buffer channel 0 read pointer register

0x01C1 34D0 WRB0_SUB Write ring buffer channel 0 subtraction register

0x01C1 34D4 WRB0_WRPTR Write ring buffer channel 0 write pointer register

0x01C1 34D8 - 0x01C1 34DF – Reserved

0x01C1 34E0 WRB1_STRT_ADDR Write ring buffer channel 1 start address register

0x01C1 34E4 WRB1_END_ADDR Write ring buffer channel 1 end address register

0x01C1 34E8 WRB1_RDPTR Write ring buffer channel 1 read pointer register

0x01C1 34EC WRB1_SUB Write ring buffer channel 1 subtraction register

0x01C1 34F0 WRB1_WRPTR Write ring buffer channel 1 write pointer register

0x01C1 34F4 - 0x01C1 34FF – Reserved

0x01C1 3500 WRB2_STRT_ADDR Write ring buffer channel 2 start address register

0x01C1 3504 WRB2_END_ADDR Write ring buffer channel 2 end address register

0x01C1 3508 WRB2_RDPTR Write ring buffer channel 2 read pointer register

0x01C1 350C WRB2_SUB Write ring buffer channel 2 subtraction register

0x01C1 3510 WRB2_WRPTR Write ring buffer channel 2 write pointer register

0x01C1 3514 - 0x01C1 351F – Reserved

0x01C1 3520 WRB3_STRT_ADDR Write ring buffer channel 3 start address register

0x01C1 3524 WRB3_END_ADDR Write ring buffer channel 3 end address register

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