Datasheet

AUX_MXI/
AUX_CLKIN
AUX_MXO
NC
AUX_V
SS
1.8 V
AUX_DV
DD18
AUX_DV
SS
1.3 V
AUX_CV
DD
DEV_MXI/
DEV_CLKIN
DEV_MXO
NC
DEV_V
SS
1.8 V
DEV_DV
DD18
DEV_DV
SS
1.3 V
DEV_CV
DD
TMS320DM6467T
SPRS605C –JULY 2009–REVISED JUNE 2012 www.ti.com
7.4.2 Clock Input Option 2—1.8-V LVCMOS-Compatible Clock Input
7.4.2.1 33.3-MHz System Oscillator Clock Input Option 2—1.8-V LVCMOS-Compatible Clock Input
In this option, a 1.8-V LVCMOS-Compatible Clock Input is used as the external clock input to the system
oscillator. The external connections are shown in Figure 7-9. The DEV_MXI/DEV_CLKIN pin is connected
to the 1.8-V LVCMOS-Compatible clock source. The DEV_MXO pin is left unconnected. The DEV_V
SS
pin
is connected to board ground (V
SS
). The DEV_DV
DD18
pin can be connected to the same 1.8-V power
supply as DV
DDR2
.
Figure 7-9. 1.8-V LVCMOS-Compatible Clock Input
The clock source must meet the DEV_MXI/DEV_CLKIN timing requirements in Section 7.5.5, Clock PLL
Electrical Data/Timing (Input and Output Clocks).
7.4.2.2 24-MHz Auxiliary Oscillator Clock Input Option 2—1.8-V LVCMOS-Compatible Clock Input
In this option, a 1.8-V LVCMOS-Compatible Clock Input is used as the external clock input to the auxiliary
oscillator. The external connections are shown in Figure 7-10. The AUX_MXI/AUX_CLKIN pin is
connected to the 1.8-V LVCMOS-Compatible clock source. The AUX_MXO pin is left unconnected. The
AUX_V
SS
pin is connected to board ground (V
SS
). The AUX_DV
DD18
pin can be connected to the same
1.8-V power supply as DV
DDR2
.
Figure 7-10. 1.8-V LVCMOS-Compatible Clock Input
The clock source must meet the AUX_MXI/AUX_CLKIN timing requirements in Section 7.5.5, Clock PLL
Electrical Data/Timing (Input and Output Clocks).
152 Peripheral Information and Electrical Specifications Copyright © 2009–2012, Texas Instruments Incorporated
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