Datasheet

Contents

Preface ....................................................................................................................................... 4

1 Introduction ........................................................................................................................ 5

1.1 Scope of Document ......................................................................................................... 5

1.2 TMS570LS04 HERCULES Development Kit (HDK) Features ........................................................ 5

1.3 HDK Board Block Diagram ................................................................................................ 6

1.4 TMS570LS04 HDK Contents .............................................................................................. 6

1.5 HDK Specifications ......................................................................................................... 7

1.6 Basic Operation ............................................................................................................. 7

1.7 Memory Map ................................................................................................................. 7

1.8 Power Supply ................................................................................................................ 7

2 Physical Description ............................................................................................................ 8

2.1 Board Layout ................................................................................................................ 8

2.2 Connectors ................................................................................................................... 9

2.2.1 20-Pin ARM JTAG Header ........................................................................................ 9

2.2.2 20-Pin Compact TI JTAG Header .............................................................................. 10

2.2.3 CAN Interface ..................................................................................................... 10

2.2.4 J4, XDS100V2 USB JTAG Interface ........................................................................... 11

2.2.5 P1, +5 V to +12 V Input .......................................................................................... 11

2.2.6 Virtual COM Port Interface ...................................................................................... 12

2.2.7 Daughter Card Interface ......................................................................................... 12

2.3 LEDs ........................................................................................................................ 16

2.4 Emulator and Pin Multiplexing Selection DIP Switch ................................................................. 16

2.5 Jumpers ..................................................................................................................... 17

2.6 S3, Power-On Reset Switch ............................................................................................. 17

2.7 S2, System Reset Switch ................................................................................................ 17

2.8 S4, Pushbutton for Clock Failure Test .................................................................................. 17

A Operation Notices .............................................................................................................. 18

A.1 Support Resources ........................................................................................................ 18

Contents SPNU569–September 2012

Submit Documentation Feedback