TMS570LS04 Hercules Development Kit (HDK) User's Guide Literature Number: SPNU569 September 2012
Contents ....................................................................................................................................... 4 Introduction ........................................................................................................................ 5 1.1 Scope of Document ......................................................................................................... 5 1.2 TMS570LS04 HERCULES Development Kit (HDK) Features ............................................
www.ti.com List of Figures 1-1. TMS570LS04 HDK Board Block Diagram ............................................................................... 6 2-1. TMS570LS04 HDK Board 2-2. 2-3. 2-4. 2-5. 2-6. 2-7. ................................................................................................. Connectors on TMS570LS04 HDK Table ............................................................................... CAN Bus Termination ....................................................................
Preface SPNU569 – September 2012 Read This First About This Manual This document describes the board level operations of the TMS570LS04 Hercules™ Development Kit (HDK). The HDK is based on the Texas Instruments TMS570LS0432 Microcontroller. The TMS570LS04 HDK is a table top card that allows engineers and software developers to evaluate certain characteristics of the TMS570LS0432 microcontroller to determine if the microcontroller meets the designer application requirements.
Chapter 1 SPNU569 – September 2012 Introduction The TMS570LS0432 HDK is a low cost and easy to use hardware and software platform for evaluating the functionality of the Texas Instruments TMS570LS0432 microcontroller family. Project collateral, schematics and PCB layouts discussed in this application report can be downloaded from the following URL: (http://processors.wiki.ti.com/index.php/TMS570LS04x_HDK_Kit). 1.
HDK Board Block Diagram HDK Board Block Diagram ENET RJ45 Ext JTAG CTI JTAG Power Select FTDI 2332 CPLD 3.3V I/O XDS100V2 PWR nRST nPOR USB EMU 1.2V Core 1.3 www.ti.com CAN/LIN/GIO/ HET EXP Conn1 TMS570LS0432 80MHz Clock Select EXP Conn3 CAN PHY CAN1 Light Sensor SPI/ADC EXP Conn2 JTAG Clock Reset GIO Button Temp Sensor CAN PHY CAN2 Figure 1-1. TMS570LS04 HDK Board Block Diagram 1.
HDK Specifications www.ti.com 1.5 HDK Specifications • • • 1.6 Board supply voltage: 5 V to 12 V DC Board supply current: 130 mA typ (fully active, CPU at 100 MHz) Dimensions: 4.90” x 4.30” x 0.85” (LxWxH) Basic Operation The HDK is designed to work with TI’s Code Composer Studio and other third party ARM IDEs. The IDEs communicate with the board through the embedded emulator or an external JTAG emulator.
Chapter 2 SPNU569 – September 2012 Physical Description This chapter describes the physical layout of the TMS570LS04 HDK board and its interfaces. 2.1 Board Layout The TMS570LS04 HDK board a 4.9 x 4.3 inch (125 x 109 mm.) six layer printed circuit board that is powered by either +5 V USB power from an external +5 V to +12 V only power supply or by USB VBUS. Figure 2-1 shows the layout of the TMS570LS04 HDK board. TMS570LS 0432 Figure 2-1.
Connectors www.ti.com 2.2 Connectors The HDK board has ten interfaces to various peripherals. These interfaces are described in Table 2-1. J4 P1 J15 J5 J3 J10 J9 TMS570LS 0432 J11 J1 J2 Figure 2-2. Connectors on TMS570LS04 HDK Table Table 2-1. Connectors on HDK Board Connector Size J1 3, 2,54mm Function DCAN1 J2 3, 2.54mm DCAN2 J3 10x2, 2.
Connectors www.ti.com Table 2-2. 20-Pin ARM JTAG Header Signal Name Pin Number Pin Number Vref 1 2 Signal Name VCC nTRST 3 4 GND TDI 5 6 GND TMS 7 8 GND TCK 9 10 GND RTCK 11 12 GND TDO 13 14 GND nRST 15 16 GND NC 17 18 GND NC 19 20 GND 2.2.2 20-Pin Compact TI JTAG Header We also implemented a compact TI JTAG header (CTI) on the board. This is the standard interface used by TI and Spectrum Digital JTAG emulators. The pinout for the connector is shown in Table 2-3.
Connectors www.ti.com Figure 2-3. CAN Bus Termination J1 H J2 L H L Figure 2-4. J1, J2 Screw Terminal Block for CAN Bus 2.2.4 J4, XDS100V2 USB JTAG Interface The USB connector J4 is used to connect to the host development system which is running the software development IDE (CCS for example). Before the board is shipped, the XDS100V2 port1 is configured as JTAG, and port2 is configured as SCI. The CPLD is also programmed to route the JTAG signals to the MCU.
Connectors www.ti.com +12 V GND P1 text text PC Board Figure 2-5. +12 V Input Jack 2.2.6 Virtual COM Port Interface The internal SCI on the TMS570LS0432 device is connected to the second port of the XDS100V2. The XDS100V2 USB driver makes the second channel of FT2232H appear as a virtual COM port (VCP). This allows the user to communicate with the USB interface via a standard PC serial emulation port. 2.2.
Connectors www.ti.com There are three daughter card interfaces, J9, J10, and J11. These connectors are described in Table 2-4. J9 J10 J11 Figure 2-6. J9, J10 and J11 Connectors Table 2-4.
Connectors www.ti.com Table 2-4.
Connectors www.ti.com Table 2-5. Expansion Connector P1 (J9, Left, TopView) (continued) Signal Name Pin Number Number Number SPI2_SOMI 69 59 60 SPI2_SIMO 70 61 62 SPI2_CS0 23 63 64 65 66 EXP_12V Pin Number Signal Name NC NC 71 SPI2_CLK GND Table 2-6.
LEDs 2.3 www.ti.com LEDs The TMS570LS04 HDK board has fourteen (14) LEDs. Four of them are under user control. Those LEDs are controlled and programmed by GIO signals. LED DS2, DS3, DS4, and DS5 indicate the presence of the power (+1.2 V, +5 V, 3.3 V, and 12 V) on the board. The LED functions are summarized in Table 2-7 and Table 2-8. Table 2-7.
Jumpers www.ti.com 2.5 Jumpers HDK board has one jumper to select crystal or oscillator for MCU. Table 2-10. Jumpers 2.6 Switch Position 1 - 2 Position 2 - 3 JP1 Oscillator Y3 Crystal Y2 S3, Power-On Reset Switch TMS570LS04 MCU has two resets: Warm Reset (nRST) and Power-On Reset (nPORRST). Switch S3 is a momentary switch that asserts power on reset to the TMS570LS0432 device. The nPORRST condition is intended to reset all logic on the device including the test and emulation circuitry. 2.
Appendix A SPNU569 – September 2012 Operation Notices The user assumes all responsibility and liability for proper and safe handling of the boards. It is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. A.1 Support Resources • • • 18 If you have problems or need additional information regarding the embedded emulation please refer to the XDS100 USB wiki on the TI web site. The URL for this site is: http://tiexpressdsp.com/index.
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
【Important Notice for Users of this Product in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
【Important Notice for Users of this Product in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
