User manual

AM335xStarterKitHardwareUsersGuide
7
Board Identity Memory
The board contains a serial EEPROM with the board specific data which allows the processor to automatically detect
which board is connected and the version of that board. Other hardware specific data can be stored in this memory as
well. The part number of the memory device used is CAT24C256WI-GT3. See the Configuration/Setup section for
details on the data in this memory.
Name Size
Contents
Header 4 MSB 0xEE3355AA LSB
Board Name 8 Name for board in ASCII “A335X_SK” = AM335x TMDSSK3358Board
Version 4 Hardware version code for board in ASCII “1.2A” = rev. 01.2A
Serial Number 12 Serial number of the board. This is a 12 character string which is: WWYY4P19nnnn where: WW = 2 digit week of the
year of production YY = 2 digit year of production nnnn = incrementing board number
Configuration
Option
32 Codes to show the configuration setup on this board. For the available EVM’s supported, the following codes are used:
ASCII “SKU#00” = default configuration Remaining 26 bytes are reserved
Available 32720 Available space for other non-volatile codes/data
Table 3:I2C Configuration
SD/MMC0
The Micro SD/MMC0 port is provided with a card socket SCHA5B0200. This is a standard Micro SD/MMC Card
type of connector which is of the low profile compact type. It is connected to the MMC0 port of the AM335x
processor. Check the AM335x data sheet and TRM for supported card types/densities.8Gb SD cards are tested with
this design. The Pin assignment is as given below.
Pin No Memory Card PIN No.
uSD#1 DAT2
uSD#2 CD/DAT3
uSD #3 CMD
uSD #4 VCC
uSD #5 CLK
uSD #6 GND
uSD #7 DAT0
uSD #8 DAT1
uSD #9 GND
uSD #10 CD
Table 4: SD/MMC0 Connector Pin Details
Ethernet
TMDSSK3358 has two Giga bit Ethernet transceivers. AR8031-AL1A from Atheros is used as a single port, tri
speed PHY. A single 3.3V is enough to power this PHY and the other voltages required were generated internally.
Reset for both the chips are driven by the SYS_WARMRESETn signal through a SN74LVC1G07 buffer.Both the
PHYs have individual 25MHz, 50ppm crystal as their clock source. The 25MHz Clock out of the EMAC1-PHY port
has been connected to the XTLI of the EMAC2-PHY as an optional clock input.