Datasheet

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TMS320C6472
www.ti.com SPRS612G–JUNE 2009– REVISED JULY 2011
Table 3-2. Device Configuration Registers (Chip-Level Registers) (continued)
HEX ADDRESS RANGE ACRONYM REGISTER NAME COMMENTS
IPCGR15
Host Interrupt Pulse Generation IPCGRH register generates an
02A8 057C or
Register interrupt pulse to host.
IPCGRH
02A8 0580 IPCAR0
02A8 0584 IPCAR1
IPCARx register acknowledges
02A8 0588 IPCAR2
IPC Acknowledgment Registers an interrupt pulse to C64x+
02A8 058C IPCAR3
Megamodulex.
02A8 0590 IPCAR4
02A8 0594 IPCAR5
02A8 0598 - 02A8 05B8 - Reserved
IPCAR15
Host Interrupt pulse Acknowledgment IPCARH register acknowledges
02A8 05BC or
Register an interrupt pulse to host.
IPCARH
02A8 05C0 - 02A8 06FC - Reserved
02A8 0700 MAC ID
02A8 0708 - 02A8 0710 - Reserved
TPMGR register configures the
02A8 0714 TPMGR Timer Pin Manager Register
timer pin manager block.
02A8 0718 RSTMUX0
02A8 071C RSTMUX1
These registers decide the
02A8 0720 RSTMUX2
actions taken upon receiving a
Reset Mux Registers
timer event/watchdog reset
02A8 0724 RSTMUX3
event.
02A8 0728 RSTMUX4
02A8 072C RSTMUX5
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