Datasheet
PRODUCTPREVIEW
TMS320C6472
SPRS612G–JUNE 2009– REVISED JULY 2011
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Table 2-5. Terminal Functions (continued)
SIGNAL
TYPE
(1)
IPD/IPU
(2) (3)
DESCRIPTION
NAME NO.
1.8-V DDR PLL analog supply voltage
NC or connected to V
SS
, if DDR is not used
NOTE: If the DDR2 Memory Controller is not used, the DV
DD18
,
DV
DD18MON
, V
REFSSTL
, AV
DDA3
, AV
DDA4
, CV
DD1
, PTV18P, and
AV
DDA3
B21 I PTV18N pins can be NC or connected directly to V
SS
(GND) to
save power. However, connecting these pins this way prevents
boundary scan from functioning on the DDR2 Memory Controller
pins. To preserve boundary-scan functionality on the DDR2
Memory Controller pins, see Section 7.3.3.
H4 1.8-V DDR analog supply voltage
NC or connected to V
SS
, if DDR is not used
NOTE: If the DDR2 Memory Controller is not used, the DV
DD18
,
DV
DD18MON
, V
REFSSTL
, AV
DDA3
, AV
DDA4
, CV
DD1
, PTV18P, and
AV
DDA4
I PTV18N pins can be NC or connected directly to V
SS
(GND) to
A21
save power. However, connecting these pins this way prevents
boundary scan from functioning on the DDR2 Memory Controller
pins. To preserve boundary-scan functionality on the DDR2
Memory Controller pins, see Section 7.3.3.
T23 1.2-V RapidIO digital supply voltage
NC or connected to V
SS
, if RapidIO is not used
Do not connect this SERDES supply to CV
DD1
NOTE: If the RapidIO interface is not used, the CV
DD2
, AV
DDA
,
DV
DDD
I DV
DDD
, DV
DDR
, and AV
DDT
pins can be NC or connected directly
V23
to V
SS
(GND) to reduce power use. However, connecting these
pins in this way prevents boundary scan from functioning on the
RapidIO pins. To preserve boundary-scan functionality on the
RapidIO pins, see Section 7.3.3.
1.5-V/1.8-V RapidIO regulator supply voltage
NC or connected to V
SS
, if RapidIO is not used
NOTE: If the RapidIO interface is not used, the CV
DD2
, AV
DDA
,
DV
DDD
, DV
DDR
, and AV
DDT
pins can be NC or connected directly
DV
DDR
R28 I
to V
SS
(GND) to reduce power use. However, connecting these
pins in this way prevents boundary scan from functioning on the
RapidIO pins. To preserve boundary-scan functionality on the
RapidIO pins, see Section 7.3.3.
A1
A19
B10
B14
B5
E1
E12
E16
1.8-V I/O supply voltage for DDR2 buffers
NC or connected to V
SS
, if DDR is not used
E6
NOTE: If the DDR2 Memory Controller is not used, the DV
DD18
,
F15
DV
DD18MON
, V
REFSSTL
, AV
DDA3
, AV
DDA4
, CV
DD1
, PTV18P, and
DV
DD18
F17 I PTV18N pins can be NC or connected directly to V
SS
(GND) to
save power. However, connecting these pins this way prevents
F19
boundary scan from functioning on the DDR2 Memory Controller
G10
pins. To preserve boundary-scan functionality on the DDR2
Memory Controller pins, see Section 7.3.3.
G12
G14
G16
G18
G6
G8
H7
J6
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