Datasheet

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TMS320C6472
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SPRS612GJUNE 2009 REVISED JULY 2011
Table 2-5. Terminal Functions (continued)
SIGNAL
TYPE
(1)
IPD/IPU
(2) (3)
DESCRIPTION
NAME NO.
G24
H23
J2
J24
K23
K25
K7
L24
L6
M23
M7
N2
DV
DD33
I 3.3-V I/O supply voltage
N6
P7
R6
T2
T7
U6
V7
W2
W24
W6
Y23
Y7
F7 1.2-V supply voltage for DDR EMIF
NC or connected to V
SS
, if DDR is not used
F9
NOTE: If the DDR2 Memory Controller is not used, the DV
DD18
,
F11
DV
DD18MON
, V
REFSSTL
, AV
DD3
, AV
DD4
, CV
DD1
, PTV18P, PTV18N,
CV
DD1
I and HHV18EN pins can be NC or connected directly to V
SS
F13
(GND) to save power. However, connecting these pins this way
K11
prevents boundary scan from functioning on the DDR2 Memory
Controller pins. To preserve boundary-scan functionality on the
K13
DDR2 Memory Controller pins, see Section 7.3.3.
N20 1-V (500-MHz device), 1.1-V (625-MHz device), 1.2-V (700-MHz
device) supply voltage for SRIO core logic
P19
NC or connected to V
SS
, if RapidIO is not used
R20
NOTE: If the RapidIO interface is not used, the CV
DD2
, AV
DDA
,
CV
DD2
I DV
DDD
, DV
DDR
, and AV
DDT
pins can be NC or connected directly
T19
to V
SS
(GND) to reduce power use. However, connecting these
pins in this way prevents boundary scan from functioning on the
U20
RapidIO pins. To preserve boundary-scan functionality on the
RapidIO pins, see Section 7.3.3.
R24 1.2-V RapidIO analog supply voltage
NC or connected to V
SS
, if RapidIO is not used
Do not connect this SERDES supply to CV
DD1
NOTE: If the RapidIO interface is not used, the CV
DD2
, AV
DDA
,
AV
DDA
I DV
DDD
, DV
DDR
, and AV
DDT
pins can be NC or connected directly
U24
to V
SS
(GND) to reduce power use. However, connecting these
pins in this way prevents boundary scan from functioning on the
RapidIO pins. To preserve boundary-scan functionality on the
RapidIO pins, see Section 7.3.3.
AV
DDA1
M29 I 1.8-V System PLL analog supply voltage
AV
DDA2
AG14 I 1.8-V EMAC PLL analog supply voltage
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