Datasheet

PRODUCTPREVIEW
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EMUClock
EMUTrace
TMS320C6472
www.ti.com SPRS612G–JUNE 2009– REVISED JULY 2011
7.20 Emulation Features and Capability
7.20.1 Advanced Event Triggering (AET)
The C6472 device supports Advanced Event Triggering (AET). This capability can be used to debug
complex problems as well as understand performance characteristics of user applications. AET provides
the following capabilities:
• Hardware Program Breakpoints: specify addresses or address ranges that can generate events such
as halting the processor or triggering the trace capture.
• Data Watchpoints: specify data variable addresses, address ranges, or data values that can generate
events such as halting the processor or triggering the trace capture.
• Counters: count the occurrence of an event or cycles for performance monitoring.
• State Sequencing: allows combinations of hardware program breakpoints and data watchpoints to
precisely generate events for complex sequences.
For more information on AET, see the following documents:
Using Advanced Event Triggering to Find and Fix Intermittent Real-Time Bugs application report (literature
number SPRA753)
Using Advanced Event Triggering to Debug Real-Time Problems in High Speed Embedded
Microprocessor Systems application report (literature number SPRA387)
7.20.2 Trace
The C6472 device supports Trace. Trace is a debug technology that provides a detailed, historical
account of application code execution, timing, and data accesses. Trace collects, compresses, and
exports debug information for analysis. Trace works in real-time and does not impact the execution of the
system.
For more information on board design guidelines for Trace Advanced Emulation, see the Emulation and
Trace Headers Technical Reference Manual (literature number SPRU655).
Table 7-154. Timing Requirements for Trace
(see Figure 7-67)
500/625/700
NO. UNIT
MIN MAX
t
w(EMUnH)
Pulse duration, EMUn high 3 - 0.6
(1)
ns
1
t
w(EMUnH)
90% Pulse duration, EMUn high detected at 90% V
OH
1.5
t
w(EMUnL)
Pulse duration, EMUn low 3 - 0.6
(1)
2
t
w(EMUnL)
10% Pulse duration, EMUn low detected at 10% V
OH
1.5
Output Skew time, time delay difference between EMU pins configured as
3 t
sko(EMUn)
390 ps 1.8 ns
trace.
(1) This parameter applies to the maximum trace export frequency operating in a 40/60 duty cycle.
Figure 7-67. Trace Timing
Copyright © 2009–2011, Texas Instruments Incorporated C64x+ Peripheral Information and Electrical Specifications 261
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