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TMS320C6472
www.ti.com SPRS612G–JUNE 2009– REVISED JULY 2011
Table 7-95. DMATCU Receive Channels 0-5 Registers (continued)
HEX ADDRESS RANGE ACRONYM REGISTER NAME
0258 1870 - 0258 187C - Reserved
0258 1880 DRCH_ABASE2 Receive Channel 2 Memory Base Address Register A
0258 1884 DRCH_AFALLOC2 Receive Channel 2 Frame Allocation Register A
0258 1888 DRCH_AFSIZE2 Receive Channel 2 Frame Size Register A
0258 188C DRCH_AFCNT2 Receive Channel 2 Frame Count Register A
0258 1890 - 0258 189C - Reserved
0258 18A0 DRCH_BBASE2 Receive Channel 2 Memory Base Address Register B
0258 18A4 DRCH_BFALLOC2 Receive Channel 2 Frame Allocation Register B
0258 18A8 DRCH _BFSIZE2 Receive Channel 2 Frame Size Register B
0258 18AC DRCH _BFCNT2 Receive Channel 2 Frame Count Register B
0258 18B0 - 0258 18BC - Reserved
0258 18C0 DRCH_ABASE3 Receive Channel 3 Memory Base Address Register A
0258 18C4 DRCH_AFALLOC3 Receive Channel 3 Frame Allocation Register A
0258 18C8 DRCH_AFSIZE3 Receive Channel 3 Frame Size Register A
0258 18CC DRCH_AFCNT3 Receive Channel 3 Frame Count Register A
0258 18D0 - 0258 18DC - Reserved
0258 18E0 DRCH_BBASE3 Receive Channel 3 Memory Base Address Register B
0258 18E4 DRCH_BFALLOC3 Receive Channel 3 Frame Allocation Register B
0258 18E8 DRCH _BFSIZE3 Receive Channel 3 Frame Size Register B
0258 18EC DRCH _BFCNT3 Receive Channel 3 Frame Count Register B
0258 18F0 - 0258 18FC - Reserved
0258 1900 DRCH_ABASE4 Receive Channel 4 Memory Base Address Register A
0258 1904 DRCH_AFALLOC4 Receive Channel 4 Frame Allocation Register A
0258 1908 DRCH_AFSIZE4 Receive Channel 4 Frame Size Register A
0258 190C DRCH_AFCNT4 Receive Channel 4 Frame Count Register A
0258 1910 - 0258 191C - Reserved
0258 1920 DRCH_BBASE4 Receive Channel 4 Memory Base Address Register B
0258 1924 DRCH_BFALLOC4 Receive Channel 4 Frame Allocation Register B
0258 1928 DRCH _BFSIZE4 Receive Channel 4 Frame Size Register B
0258 192C DRCH _BFCNT4 Receive Channel 4 Frame Count Register B
0258 1930 - 0258 193C - Reserved
0258 1940 DRCH_ABASE5 Receive Channel 5 Memory Base Address Register A
0258 1944 DRCH_AFALLOC5 Receive Channel 5 Frame Allocation Register A
0258 1948 DRCH_AFSIZE5 Receive Channel 5 Frame Size Register A
0258 194C DRCH_AFCNT5 Receive Channel 5 Frame Count Register A
0258 1950 - 0258 195C - Reserved
0258 1960 DRCH_BBASE5 Receive Channel 5 Memory Base Address Register B
0258 1964 DRCH_BFALLOC5 Receive Channel 5 Frame Allocation Register B
0258 1968 DRCH _BFSIZE5 Receive Channel 5 Frame Size Register B
0258 196C DRCH _BFCNT5 Receive Channel 5 Frame Count Register B
0258 1970 - 0258 197C - Reserved
Table 7-96. TDMU Channel Bitmaps
HEX ADDRESS RANGE ACRONYM REGISTER NAME
0258 8000 - 0258 80FC XBM_XBMA0 Transmit Channel 0 Bitmap A
0258 8100 - 0258 81FC XBM_XBMB0 Transmit Channel 0 Bitmap B
0258 8200 - 0258 82FC XBM_XBMA1 Transmit Channel 1 Bitmap A
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