Datasheet

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TMS320C6472
SPRS612G–JUNE 2009– REVISED JULY 2011 www.ti.com
7.10.3.1 PLL3 Peripheral ID Register
The peripheral identification register (PID) is a constant register that contains the ID and ID revision
number for that module. The PID stores version information used to identify the module. All bits within this
register are read-only (writes have no effect).
31 24 23 16 15 8 7 0
Reserved TYPE CLASS REV
R-0 R-01 R-08 R-0D
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 7-35. Peripheral ID Register (PID)
Table 7-46. Peripheral ID Register (PID) Field Descriptions
Bit Field Value Description
31:24 Reserved Reserved
23:16 TYPE 01h Peripheral Type
15:8 CLASS 08h Peripheral Class
7 REV 0Dh Peripheral Revision. Identifies the revision level of the specific instance of the peripheral.
7.10.3.2 PLL3 PLL Control Register (PLLCTL)
The PLL control register (PLLCTL) is shown in Figure 7-36 and described in Table 7-47.
31 16
Reserved
R-00 0001h
15 8 7 6 5 4 3 2 1 0
PLL
Reserved Rsvd Rsvd Reserved PLLRST Rsvd PLLEN
PWRDN
R-00 0001h R/W-0 R-1 R/W-10 R/W-1 R-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 7-36. PLL Control Register (PLLCTL)
Table 7-47. PLL Control Register (PLLCTL) Field Descriptions
(1)
Bit Field Value Description
31:8 Reserved Reserved. The reserved bit location is always read as 00 0001h. A value written to this field has no
effect.
7 Reserved Reserved. Writes to this register must keep this bit as 0.
6 Reserved Reserved. The reserved bit location is always read as 1. A value written to this field has no effect.
5:4 Reserved Reserved. Writes to this register must keep these bits as 10.
3 PLLRST PLL reset bit
0 PLL reset is released
1 PLL reset is asserted
2 Reserved Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
1 PLLPWRDN PLL power-down mode select bit
0 PLL is operational
1 PLL is placed in power-down state; i.e., all analog circuitry in the PLL is turned-off
0 Reserved Reserved. Writes to this register should set this bit as 1.
(1) The value of this register is changed by the ROM bootloader.
174 C64x+ Peripheral Information and Electrical Specifications Copyright © 2009–2011, Texas Instruments Incorporated
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