Datasheet

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TMS320C6472
SPRS612G–JUNE 2009– REVISED JULY 2011 www.ti.com
7.9.3.5 PLL2 PLL Controller Status Register (PLLSTAT)
The PLL controller status register (PLLSTAT) shows the PLL controller status. PLLSTAT is shown in
Figure 7-30 and described in Table 7-39.
31 16
Reserved
R-0000 0000 0000 0000 0000 0000 0000 001
15 1 0
Reserved GOSTAT
R-0000 0000 0000 0000 0000 0000 0000 001 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 7-30. PLL Controller Status Register (PLLSTAT)
Table 7-39. PLL Controller Status Register (PLLSTAT) Field Descriptions
Bit Field Value Description
31:1 Reserved 0000 0000 0000 Reserved. A value written to this field has no effect.
0000 0000 0000
0000 001
0 GOSTAT GO operation status.
0 GO operation is not in progress. SYSCLK divide ratios are not being changed.
1 GO operation is in progress. SYSCLK divide ratios are being changed.
168 C64x+ Peripheral Information and Electrical Specifications Copyright © 2009–2011, Texas Instruments Incorporated
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