Datasheet

PRODUCTPREVIEW
TMS320C6472
www.ti.com SPRS612G–JUNE 2009– REVISED JULY 2011
Table 2-3. Boot Mode Operation
BOOTMODE[3:0] DESCRIPTION TYPE CFGGP[4:0]
0 (0000) Immediate boot Immediate Boot Don’t Care
1 (0001) Host boot (HPI) Host Don’t Care
CFGGP[4] =
0 PLLx9 mode of main PLLCTL is selected
2 (0010) Master I2C boot for I2C address 50h ROM
1 PLLx19 mode of main PLLCTL is
selected
CFGGP[3:0] = Boot PARAM index
CFGGP[4] =
0 PLLx9 mode of main PLLCTL is selected
3 (0011) Master I2C boot for I2C address 51h ROM
1 PLLx19 mode of main PLLCTL is
selected
CFGGP[3:0] = Boot PARAM index
CFGGP[4] =
0 PLLx9 mode of main PLLCTL is selected
4 (0100) Slave I2C boot ROM
1 PLLx19 mode of main PLLCTL is
selected
CFGGP[3:0] = Don’t Care
UTOPIA boot 8-bit PLLx10 of main PHY ID
5 (0101) ROM
PLLCTL
UTOPIA boot 8-bit PLLx20 of main PHY ID
6 (0110) ROM
PLLCTL
UTOPIA boot 16-bit PLLx10 of main PHY ID
7 (0111) ROM
PLLCTL
UTOPIA boot 16-bit PLLx20 of main PHY ID
8 (1000) ROM
PLLCTL
CFGGP[4] =
0 PLLx10 mode of main PLLCTL is
selected
Ethernet MAC Port 0 boot
1 PLLx20 mode of main PLLCTL is
9 (1001) (mode and speed determined by ROM
selected
MACSEL0 pins)
CFGGP[3:0]: Device ID (when RMII is selected,
CFGGP[3] controls speed - 1 for 100 Mbs, 0 for 10
Mbps - and Device ID[3] is 0)
CFGGP[4] =
0 PLLx10 mode of main PLLCTL is
selected
Ethernet MAC Port 1 boot
1 PLLx20 mode of main PLLCTL is
10 (1010) (mode and speed determined by ROM
selected
MACSEL1 pins)
CFGGP[3:0]: Device ID (when RMII is selected,
CFGGP[3] controls speed - 1 for 100 Mbs, 0 for 10
Mbps - and Device ID[3] is 0)
CFGGP[4] =
0 PLLx10 mode of main PLLCTL is
selected
11 (1011) RIO1 ROM
1 PLLx20 mode of main PLLCTL is
selected
CFGGP [3:0]: Node (1111b for default)
CFGGP[4] =
0 PLLx10 mode of main PLLCTL is
selected
12 (1100) RIO2 ROM
1 PLLx20 mode of main PLLCTL is
selected
CFGGP [3:0]: Node (1111b for default)
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