Datasheet

PRODUCTPREVIEW
TMS320C6472
SPRS612GJUNE 2009 REVISED JULY 2011
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6.2 Recommended Operating Conditions
(1)
PARAMETER MIN NOM MAX UNIT
500 MHz 0.95 1.0 1.05
CV
DD
Supply voltage, Core 625 MHz 1.05 1.1 1.16 V
700 MHz 1.14 1.2 1.26
500 MHz 0.95 1.0 1.05
CV
DD2
Supply voltage, SRIO Core 625 MHz 1.05 1.1 1.16 V
700 MHz 1.14 1.2 1.26
CV
DD1
Supply volttage, 1.2-V DDR Core 1.14 1.2 1.26 V
DV
DD33
Supply voltage, 3.3-V I/O 3.135 3.3 3.465 V
DV
DD18
Supply voltage, 1.8-V I/O (DDR) 1.71 1.8 1.89 V
DV
DD15
Supply voltage, 1.8-V/1.5-V I/O (RGMII) 1.4 1.9 V
V
REFHSTL
Reference voltage, RGMII I/O 0.7 0.95 V
(0.5 * DV
DD15
)
V
REFSSTL
Reference voltage, DDR2 I/O 0.855 0.9 0.945 V
(0.5 * DV
DD18
)
AV
DDA1
Analog supply voltage, PLL1 (System PLL) 1.71 1.8 1.89 V
AV
DDA2
Analog supply voltage, PLL2 (EMAC PLL) 1.71 1.8 1.89 V
AV
DDA3
Analog supply voltage, PLL3 (DDR PLL) 1.71 1.8 1.89 V
AV
DDA4
Analog supply voltage, DDR 1.71 1.8 1.89 V
DV
DDD
SRIO Digital supply voltage 1.14 1.2 1.26 V
AV
DDA
SRIO Analog supply voltage 1.14 1.2 1.26 V
AV
DDT
SRIO Termination voltage 1.14 1.2 1.26 V
DV
DDR
SRIO Regulator supply voltage 1.35 1.5/1.8 1.98 V
3.3-V pins (except 2.0 DV
DD33
+ 0.5
I2C pins)
I2C pins 0.7 * DV
DD33
DV
DD33
+ 0.5
V
IH
High-level input voltage V
RGMII pins V
REFHSTL
+ 0.10 DV
DD15
+ 0.3
DDR2 memory V
REFSSTL
+ 0.125 DV
DD18
+ 0.3
controller pins
3.3-V pins (except -0.5 0.8
I2C pins)
I2C pins -0.5 0.3 * DV
DD33
V
IL
Low-level input voltage V
RGMII pins -0.3 V
REFHSTL
- 0.1
DDR2 memory -0.3 V
REFSSTL
- 0.125
controller pins
CV
DD
= CV
DD2
=
1.0 V, CPU
2.38
frequency =
500 MHz
CV
DD
= CV
DD2
=
1.1 V, CPU
P
CDD
Core supply power
(2)
3.76 W
frequency =
625 MHz
CV
DD
= CV
DD2
=
1.2 V, CPU
5.42
frequency =
700 MHz
(1) Operating conditions are at 500 MHz, 625 MHz, or 700 MHz.
(2) Assumes the following conditions: CPU utilization 30% DSP/60% control; DDR2 at 30% utilization (266 MHz), 35% writes, 32 bits, 15%
bit switching; TSIP0, TSIP1, and TSIP2 at 20% utilization, 15% switching; UTOPIA 50 MHz, 16-bit at 50% utilization, 15% switching
EMAC0, 1000 Mbps, RGMII, 50% utilization, 50% switching; EMAC1 disabled; SRIO both lanes disabled; all timers active; HPI disabled;
I2C enabled at 10% utilization; room temperature (25°C). The actual power consumption is application-dependent. For more details on
core and I/O activity, see the TMS320C6472/TMS320TCI6486 Power Consumption Summary (literature number SPRAAS4).
114 Device Operating Conditions Copyright © 20092011, Texas Instruments Incorporated
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