Datasheet

XDS560 Emulator Cable Pod Logic
3-8
To support selection of the proper I/O voltage, the target header has a Target
Voltage Detect (TVD) signal. This signal (pin 5) should be tied to the I/O voltage
of the target processor.
If the target system needs to supports multiple I/O voltages on the scan string,
the lowest voltage devices should be placed first.
A translation buffer should be used to connect the rest of the scan string. TCK,
TMS, and TRST must have similar considerations.
Two copies of each signal may be required with each driving a different voltage
level.
Figure 3−2. JTAG Emulator Cable/Pod Interface
J1
1
3
5
7
9
11
13
2
4
6
8
10
12
14
TRST
TDIS
GND
GND
GND
GND
EMU1
TMS
TDI
TVD
TDO
TCKR
TCK
EMU0
EMULATION HDR
100 Ω
100 pF
100
KΩ
TVD Voltage /2
TVD Voltage
KΩ
100
VCC
10 KΩ
.01 µF100 KΩ10 KΩ
.01 µF
In
Comparator
Op−amp
In
KΩ
100
KΩ
100
KΩ KΩ
100 100
Out
Out
Out
Out
Out
Out
27 Ω
In1
In2
In3
In4
27 Ω
27 Ω
27 Ω
0 Ω
27 Ω
Level
translator
Comparator