Datasheet

Bus Protocol
3-6
3.4 Bus Protocol
The IEEE 1149.1 standard covers the requirements for the test access port
(TAP) bus slave devices and provides certain rules, summarized as follows:
- The TMS/TDI inputs are sampled on the rising edge of the TCK signal of
the slave device.
- The TDO output is clocked from the falling edge of the TCK signal of the
slave device.
When these devices are linked together in series, the TDO of one device has
approximately one-half TCK cycle setup time before the next device’s TDI sig-
nal.
This type of timing scheme minimizes race conditions that would occur if both
TDO and TDI were timed from the same TCK edge. The penalty for this timing
scheme is a reduced TCK frequency.
The IEEE 1149.1 standard does not provide rules for bus master (emulator)
devices. Instead, it states that it expects a bus master to provide bus slave
compatible timings. The XDS560 emulator provides timings that meet the bus
slave rules.