Datasheet
ONE OF 12
AIO_MUX2
PINS
AIOSET REG
AIOCLEAR REG
AIOTOGGLE REG
AIODIR REG
AIO_MUX2
AIODAT REG
ANALOG
COMMON
INTERFACE
BUS
C28x
CPU
ADC
2
AIOMUX2 REG
C28
CPU
BUS
ANALOG BUS
GPIOPUR REGGPGPUD REG
‘1’
PULL-UP
DISABLED
ON RESET
PULL UP
DIS
GPGDIR REG
AIODIR REG
ONE OF 8
GPIO_MUX2
PINS
GPGSET REG
GPGCLEAR REG
GPGTOGGLE REG
GPGDIR REG
GPIO_MUX2
GPGDAT REG
GPIO192
GPIO193
GPIO194
GPIO195
GPIO196
GPIO197
GPIO198
GPIO199
6
COMPARATOR
+ DAC UNITS
GPGMUX1 REG
COMPA1
COMPA2
COMPA3
COMPA4
COMPA5
COMPA6
COMPOUT1
COMPOUT2
COMPOUT3
COMPOUT4
COMPOUT5
COMPOUT6
ONE OF 12
AIO_MUX1
PINS
AIOSET REG
AIOCLEAR REG
AIOTOGGLE REG
AIODIR REG
AIO_MUX1
AIODAT REG
ADC
1
AIOMUX1 REG
AIODIR REG
ADC2INA0
ADC2INA2
ADC2INA3
ADC2INA4
ADC2INA6
ADC2INA7
AIO18
AIO20
AIO22
AIO26
AIO28
AIO30
ADC2INB0
ADC2INB2
ADC2INB3
ADC2INB4
ADC2INB6
ADC2INB7
ADC1INA0
ADC1INA2
ADC1INA3
ADC1INA4
ADC1INA6
ADC1INA7
AIO2
AIO4
AIO6
AIO10
AIO12
AIO14
ADC1INB0
ADC1INB2
ADC1INB3
ADC1INB4
ADC1INB6
ADC1INB7
COMPB1
COMPB2
COMPB3
COMPB4
COMPB5
COMPB6
F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014
www.ti.com
Figure 3-17. Pin Muxing on AIO_MUX1, AIO_MUX2, and GPIO_MUX2
82 Device Overview Copyright © 2012–2014, Texas Instruments Incorporated
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