Datasheet

F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014 www.ti.com
Table 3-28. GPIO_MUX1 Pin Assignments (M3 Primary Modes)
(1)
Analog M3 M3 M3 M3 M3 M3 M3 M3 M3 M3 M3
Device
Mode Primary Primary Primary Primary Primary Primary Primary Primary Primary Primary Primary
Pin Name
(USB Pins) Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7 Mode 8 Mode 9 Mode 10 Mode 11
– PA0_GPIO0 U0RX – – – – – – I2C1SCL U1RX – –
– PA1_GPIO1 U0TX – – – – – – I2C1SDA U1TX – –
– PA2_GPIO2 SSI0CLK – MIITXD2 – – – – – – – –
– PA3_GPIO3 SSI0FSS – MIITXD1 – – – – – – – –
– PA4_GPIO4 SSI0RX – MIITXD0 – CAN0RX – – – – – –
– PA5_GPIO5 SSI0TX – MIIRXDV – CAN0TX – – – – – –
– PA6_GPIO6 I2C1SCL CCP1 MIIRXCK – – CAN0RX – USB0EPEN – – –
– PA7_GPIO7 I2C1SDA CCP4 MIIRXER – – CAN0TX CCP3 USB0PFLT – – –
– PB0_GPIO8 CCP0 – – – U1RX – – – – – –
– PB1_GPIO9 CCP2 – – CCP1 U1TX – – – – – –
– PB2_GPIO10 I2C0SCL – – CCP3 CCP0 – – USB0EPEN – – –
– PB3_GPIO11 I2C0SDA – – – – – – USB0PFLT – – –
– PB4_GPIO12 – – – U2RX CAN0RX – U1RX EPI0S23 – – –
– PB5_GPIO13 – CCP5 CCP6 CCP0 CAN0TX CCP2 U1TX EPI0S22 – – –
– PB6_GPIO14 CCP1 CCP7 – – – CCP5 – EPI0S37
(2)
– – –
– PB7_GPIO15 – – – EXTNMI – – MIIRXD1 EPI0S36
(2)
– – –
– PD0_GPIO16 – CAN0RX – U2RX U1RX CCP6 MIIRXDV – – – –
– PD1_GPIO17 – CAN0TX – U2TX U1TX CCP7 MIITXER – – CCP2 –
– PD2_GPIO18 U1RX CCP6 – CCP5 – – – EPI0S20 – – –
– PD3_GPIO19 U1TX CCP7 – CCP0 – – – EPI0S21 – – –
– PD4_GPIO20 CCP0 CCP3 – MIITXD3 – – – – – EPI0S19 –
– PD5_GPIO21 CCP2 CCP4 – MIITXD2 – – – – U2RX EPI0S28 –
– PD6_GPIO22 – – – MIITXD1 – – – – U2TX EPI0S29 –
– PD7_GPIO23 – – CCP1 MIITXD0 – – – – – EPI0S30 –
– PE0_GPIO24 – SSI1CLK CCP3 – – – – EPI0S8 USB0PFLT – –
– PE1_GPIO25 – SSI1FSS – CCP2 CCP6 – – EPI0S9 – – –
– PE2_GPIO26 CCP4 SSI1RX – – CCP2 – – EPI0S24 – – –
– PE3_GPIO27 CCP1 SSI1TX – – CCP7 – – EPI0S25 – – –
– PE4_GPIO28 CCP3 – – – U2TX CCP2 MIIRXD0 EPI0S34
(2)
– – –
– PE5_GPIO29 CCP5 – – – – – – EPI0S35
(2)
– – –
– PE6_GPIO30 – – – – – – – – – – –
– PE7_GPIO31 – – – – – – – – – – –
(1) Blank fields represent Reserved functions.
(2) This muxing option is only available on silicon Revision A devices; this muxing option is not available on silicon Revision 0 devices.
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