Datasheet

CLPMCR0 REG
C28CPUCLK
C28NMIINT
TIMER 0
execution of IDLE instruction
activates the IDLES signal
ENTER
IDLE
MODE
ENTER
STANDBY
MODE
EXIT
IDLE
MODE
EXIT
STANDBY
MODE
IDLES
LPM(0)LPM(1)
Requests To Wake From STANDBY Mode
Requests To Wake From IDLE Mode
TINT2
TIMER 2
C28 XINT(3)
C28x NMI
EPWM (12)
C28 DMA
C28CLKENBx
LOSPCP REG
ECAP (6)
I C
2
C28LSPCLK
C28x CPU
‘0’
C28CLKIN
MASTER SUBSYSTEM
STANDBY
MODE
PLLSYSCLK
LPMWAKE
/32
/1
/2
/4
…
/14
MTOCIPC(1)
IPC
LSPCLK
CLOCKFAIL
TIMER 1
TINT 1
C28x NMI
EQEP (3)
GPIO_MUX1
SCI
SPI
McBSP
TMR2CLK
CPCLKCR3 REG
CPCLKCR1 REG
CPCLKCR0 REG
10MHZCLK
C28x
PIE
PIEINTRS (1)
OSCCLK
/1
/2
/4
/8
/16
OSCCLK
C28SYSCLK
10MHZCLK
CTMR2CLK
PRESCALE
TMR2CLKSRCSEL
CLKCTL REG
C28SYSCLK
GPIO_MUX1
PULSE
STRETCH
SOCAO
SOCBO
SYNCO
OFF
/1
/2
/4
/8
CCLKCTL REG
CLKDIV
ASYSCLK
ANALOG SUBSYSTEM
SRXRST
ACIBRST
ASYSRST
C28x
PIE
PIEINTRS (12:1)
C28 FPU/VCU
CLPMSTAT REG
C28SYSCLK
LPM WAKEUP
LPMSEL1 REG
LPMSEL2 REG
SELECT QUALIFICATION
SELECT ONE OF 62 GPIs
SYSPLLSTAT REG
SYSPLLMULT REG
SYSPLLCTL REG
SYSDIVSEL REG
CCLKREQUEST REG
M3SSCLK
GPI (63:0)
CLKOFF REG
GPIO_MUX1
/4
XCLKOUT
PF2_GPIO34
C28SYSCLK
C28SYSCLK
0
1
2
3
XPLLCLKCFG REG
XPLLCLKOUTDIV
OFF
/4
/2
/1
OFF
CXCLK REG
XCLKOUTDIV
(NOTE: IN REVISION 0 OF SILICON, XCLKOUT = PLLSYSCLK DIVIDED DOWN BY 1, 2 OR 4)
F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
www.ti.com SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014
Figure 3-12. C28x Clocks and Low-Power Modes
Copyright © 2012–2014, Texas Instruments Incorporated Device Overview 61
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