Datasheet

F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014 www.ti.com
3.10.2 Crystal Oscillator/Resonator (Pins X1/X2 and V
SSOSC
)
The main oscillator circuit connects to an external crystal through pins X1 and X2. If a resonator is used
(version of a crystal with built-in load capacitors), its ground terminal should be connected to the pin
V
SSOSC
(not board ground). The V
SSOSC
pin should also be used to ground the external load capacitors
connected to the two crystal terminals as shown in Figure 3-7.
3.10.3 External Oscillators (Pins X1, V
SSOSC
, XCLKIN)
Concerto has two pins (X1 and XCLKIN) into which a single-ended clock can be driven from external
oscillators or other clock sources. When connecting an external clock source through the X1 terminal, the
X2 terminal should be left unconnected. Most internal clocks of this device are derived from the X1 clock
input (or X1/X2 crystal) . The XCLKIN clock is only used by the USB PLL and CAN peripherals. Figure 3-7
shows how to connect external oscillators to the X1 and XCLKIN terminals.
When connecting an external oscillator through the X1 terminal, use good design practices to minimize
EMI as well as clock jitter induced by external noise sources. Minimize the loop area formed between the
forward current path (from the oscillator OUT terminal to the MCU X1 terminal) and the return path (from
the MCU V
SSOSC
terminal to the oscillator GND terminal). In this case, the external oscillator should be
grounded only through the V
SSOSC
pin.
Locate the external oscillator as close to the MCU as practical. Ideally, the return ground trace should be
an isolated trace directly underneath the forward trace or run adjacent to the trace on the same layer.
Spacing should be kept minimal, with any other nearby traces double-spaced away, so that the
electromagnetic fields created by the two opposite currents cancel each other out as much as possible,
thus reducing parasitic inductances that radiate EMI.
While the above is the preferred method of connecting external oscillators to the X1 terminal, the ground
pin of an oscillator or another clock source (for example, an FPGA) can also be connected to the board’s
ground plane, in which case the MCU V
SSOSC
terminal should be left unconnected.
The XCLKIN terminal does not have a dedicated ground pin (like the V
SSOSC
for the X1 pin); thus, when
using an external oscillator to input clock through XCLKIN, the ground pin of that oscillator should be
connected to the board ground (see Figure 3-7).
3.10.4 Main PLL
The Main PLL uses the reference clock from pins X1 (external oscillator) or X1/X2 (external
crystal/resonator). The input clock is multiplied by an integer multiplier and a fractional multiplier as
selected by the SPLLIMULT and SPLLFMULT fields of the SYSPLLMULT register. For example, to
achieve PLL multiply of 28.5, the integer multiplier should be set to 28, and the fractional multiplier to 0.5.
The output clock from the Main PLL must be between 150 MHz and 550 MHz. The PLL output clock is
then divided by 2 before entering a mux that selects between this clock and the PLL input clock –
OSCCLK (used in PLL bypass mode). The PLL bypass mode is selected by setting the SPLLIMULT field
of the SYSPLLMULT register to 0. The output clock from the mux next enters a divider controlled by the
SYSDIVSEL register, after which the output clock becomes the PLLSYSCLK. Figure 3-8 shows the Main
PLL function and configuration examples. Table 3-20 to Table 3-23 list the integer multiplier configuration
values.
46 Device Overview Copyright © 2012–2014, Texas Instruments Incorporated
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