Datasheet

F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014 www.ti.com
7.3.3 Enhanced Quadrature Encoder Pulse Module
The eQEP module interfaces directly with linear or rotary incremental encoders to obtain position,
direction, and speed information from rotating machines used in high-performance motion and position-
control systems. There are three Type 0 eQEP modules in each Concerto device.
Each eQEP peripheral comprises five major functional blocks: Quadrature Capture Unit (QCAP), Position
Counter/Control Unit (PCCU), Quadrature Decoder (QDU), Unit Time Base for speed and frequency
measurement (UTIME), and Watchdog timer for detecting stalls (QWDOG). The C28x CPU controls and
communicates with these modules through a set of associated registers (see Figure 7-38). The eQEP
peripherals are clocked by C28SYSCLK, and its registers are accessible by the C28x CPU. This
peripheral clock can be enabled or disabled by flipping a bit in one of the system control registers.
Each eQEP peripheral connects through the GPIO_MUX1 block to four device pins. Two of the four pins
are always inputs, while the other two can be inputs or outputs, depending on the operating mode. The
PCCU block of each eQEP also drives one interrupt to the C28x PIE. There is a total of three EQEPxINT
interrupts—one from each of the three eQEP modules.
7.3.3.1 eQEP Electrical Data and Timing
Table 7-37 shows the eQEP timing requirement and Table 7-38 shows the eQEP switching
characteristics.
Table 7-37. eQEP Timing Requirements
(1)
MIN MAX UNIT
t
w(QEPP)
QEP input period Asynchronous
(2)
/synchronous 2t
c(SCO)
cycles
With input qualifier 2[1t
c(SCO)
+ t
w(IQSW)
] cycles
t
w(INDEXH)
QEP Index Input High time Asynchronous
(2)
/synchronous 2t
c(SCO)
cycles
With input qualifier 2t
c(SCO)
+ t
w(IQSW)
cycles
t
w(INDEXL)
QEP Index Input Low time Asynchronous
(2)
/synchronous 2t
c(SCO)
cycles
With input qualifier 2t
c(SCO)
+ t
w(IQSW)
cycles
t
w(STROBH)
QEP Strobe High time Asynchronous
(2)
/synchronous 2t
c(SCO)
cycles
With input qualifier 2t
c(SCO)
+ t
w(IQSW)
cycles
t
w(STROBL)
QEP Strobe Input Low time Asynchronous
(2)
/synchronous 2t
c(SCO)
cycles
With input qualifier 2t
c(SCO)
+ t
w(IQSW)
cycles
(1) For an explanation of the input qualifier parameters, see Table 6-33.
(2) Refer to the F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B Concerto MCUs Silicon Errata
(literature number SPRZ375) for limitations in the asynchronous mode.
Table 7-38. eQEP Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
d(CNTR)xin
Delay time, external clock to counter increment 4t
c(SCO)
cycles
t
d(PCS-OUT)QEP
Delay time, QEP input edge to position compare sync 6t
c(SCO)
cycles
output
218 Peripheral Information and Timings Copyright © 2012–2014, Texas Instruments Incorporated
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