Datasheet

F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014 www.ti.com
7.3.1.1 HRPWM Electrical Data and Timing
Table 7-31 shows the high-resolution PWM switching characteristics.
Table 7-31. High-Resolution PWM Characteristics at SYSCLKOUT = (60–150 MHz)
PARAMETER MIN TYP MAX UNIT
Micro Edge Positioning (MEP) step size
(1)
150 310 ps
(1) Maximum MEP step size is based on worst-case process, maximum temperature and minimum voltage. MEP step size will increase
with low voltage and high temperature and decrease with voltage and cold temperature.
Applications that use the HRPWM feature should use MEP Scale Factor Optimizer (SFO) estimation software functions. See the TI
software libraries for details of using SFO function in end applications. SFO functions help to estimate the number of MEP steps per
SYSCLKOUT period dynamically while the HRPWM is in operation.
7.3.1.2 ePWM Electrical Data and Timing
Table 7-32 shows the PWM timing requirements and Table 7-33 shows the PWM switching
characteristics.
Table 7-32. ePWM Timing Requirements
(1)
MIN MAX UNIT
t
w(SYCIN)
Sync input pulse width Asynchronous 2t
c(SCO)
cycles
Synchronous 2t
c(SCO)
cycles
With input qualifier 1t
c(SCO)
+ t
w(IQSW)
cycles
(1) For an explanation of the input qualifier parameters, see Table 6-33.
Table 7-33. ePWM Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
w(PWM)
Pulse duration, PWMx output high/low 20 ns
t
w(SYNCOUT)
Sync output pulse width 8t
c(SCO)
cycles
t
d(PWM)tza
Delay time, trip input active to PWM forced high no pin load 25 ns
Delay time, trip input active to PWM forced low
t
d(TZ-PWM)HZ
Delay time, trip input active to PWM Hi-Z 20 ns
214 Peripheral Information and Timings Copyright © 2012–2014, Texas Instruments Incorporated
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