Datasheet

2 3
1
MIIRXCK
2 3
1
MIITXCK
F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014 www.ti.com
7.2.6.3 EMAC Electrical Data and Timing
Table 7-24. Timing Requirements for MIITXCK (see Figure 7-27)
100 Mbps 10 Mbps
NO. UNIT
MIN MAX MIN MAX
Cycle time, MIITXCK (25 MHz) 40 40
1 t
c(TXCK)
ns
Cycle time, MIITXCK (2.5 MHz) 400 400
2 t
w(TXCKH)
Pulse duration, MIITXCK high 16 24 196 204 ns
3 t
w(TXCKL)
Pulse duration, MIITXCK low 16 24 196 204 ns
Figure 7-27. 100/10Mb/s MII Transmit Clock Timing
Table 7-25. Timing Requirements for MIIRXCK (see Figure 7-28)
100 Mbps 10 Mbps
NO. UNIT
MIN MAX MIN MAX
Cycle time, MIIRXCK (25 MHz) 40 40
1 t
c(RXCK)
ns
Cycle time, MIIRXCK (2.5 MHz) 400 400
2 t
w(RXCKH)
Pulse duration, MIIRXCK high 16 24 196 204 ns
3 t
w(RXCKL)
Pulse duration, MIIRXCK low 16 24 196 204 ns
Figure 7-28. 100/10Mb/s MII Receive Clock Timing
208 Peripheral Information and Timings Copyright © 2012–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: F28M36P63C F28M36P53C F28M36H53C F28M36H53B F28M36H33C F28M36H33B