Datasheet

CAN
CORE
PIN
CANxRX
CANxTX
PIN
GPIO_MUX1
M3
CPU
REGISTER
ACCESS
M3SSCLK
CAN (M3)
M3CLKENBx
M3 CLOCKS
M3 NVIC
CANxIRQ
CANxCLK
INTR
32 MESSAGE
OBJECTS
MESSAGE
RAM
MESSAGE RAM
INTERFACE
MESSAGE HANDLER
REGISTERS AND MESSAGE
OBJECT ACCESS (IFX)
MODULE INTERFACE
F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014 www.ti.com
Figure 7-24. CAN (Cortex-M3)
202 Peripheral Information and Timings Copyright © 2012–2014, Texas Instruments Incorporated
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