Datasheet

F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014 www.ti.com
Table 3-12. Master Subsystem Peripherals
µDMA M Address Master Subsystem Size C Address
C DMA Access
(2)
Access (Byte-Aligned)
(1)
Peripherals (Bytes) (x16 Aligned)
(2)
yes 4000 0000 – 4000 0FFF Watchdog Timer 0 Registers 4K
yes 4000 1000 – 4000 1FFF Watchdog Timer 1 Registers 4K
4000 2000 – 4000 3FFF Reserved
yes 4000 4000 – 4000 4FFF M GPIO Port A (APB Bus)
(1)
4K
yes 4000 5000 – 4000 5FFF M GPIO Port B (APB Bus)
(1)
4K
yes 4000 6000 – 4000 6FFF M GPIO Port C (APB Bus)
(1)
4K
yes 4000 7000 – 4000 7FFF M GPIO Port D (APB Bus)
(1)
4K
yes 4000 8000 – 4000 8FFF SSI0 4K
yes 4000 9000 – 4000 9FFF SSI1 4K
yes 4000 A000 – 4000 AFFF SSI2 4K
yes 4000 B000 – 4000 BFFF SSI3 4K
yes 4000 C000 – 4000 CFFF UART0 4K
yes 4000 D000 – 4000 DFFF UART1 4K
yes 4000 E000 – 4000 EFFF UART2 4K
yes 4000 F000 – 4000 FFFF UART3 4K
yes 4001 0000 – 4001 0FFF UART4 4K
4001 1000 – 4001 FFFF Reserved
no 4002 0000 – 4002 07FF I2C0 Master 2K
no 4002 0800 – 4002 0FFF I2C0 Slave 2K
no 4002 1000 – 4002 17FF I2C1 Master 2K
no 4002 1800 – 4002 1FFF I2C1 Slave 2K
4002 2000 – 4002 3FFF Reserved
yes 4002 4000 – 4002 4FFF M GPIO Port E (APB Bus)
(1)
4K
yes 4002 5000 – 4002 5FFF M GPIO Port F (APB Bus)
(1)
4K
yes 4002 6000 – 4002 6FFF M GPIO Port G (APB Bus)
(1)
4K
yes 4002 7000 – 4002 7FFF M GPIO Port H (APB Bus)
(1)
4K
4002 8000 – 4002 FFFF Reserved
yes 4003 0000 – 4003 0FFF GP Timer 0 4K
yes 4003 1000 – 4003 1FFF GP Timer 1 4K
yes 4003 2000 – 4003 2FFF GP Timer 2 4K
yes 4003 3000 – 4003 3FFF GP Timer 3 4K
4003 4000 – 4003 CFFF Reserved
yes 4003 D000 – 4003 DFFF M GPIO Port J (APB Bus)
(1)
4K
4003 E000 – 4003 FFFF Reserved
yes 4004 8000 – 4004 8FFF ENET MAC0 4K
4004 9000 – 4004 FFFF Reserved
yes 4005 0000 – 4005 0FFF USB MAC0 4K
4005 1000 – 4005 7FFF Reserved
yes 4005 8000 – 4005 8FFF M GPIO Port A (AHB Bus)
(1)
4K
yes 4005 9000 – 4005 9FFF M GPIO Port B (AHB Bus)
(1)
4K
yes 4005 A000 – 4005 AFFF M GPIO Port C (AHB Bus)
(1)
4K
yes 4005 B000 – 4005 BFFF M GPIO Port D (AHB Bus)
(1)
4K
yes 4005 C000 – 4005 CFFF M GPIO Port E (AHB Bus)
(1)
4K
yes 4005 D000 – 4005 DFFF M GPIO Port F (AHB Bus)
(1)
4K
yes 4005 E000 – 4005 EFFF M GPIO Port G (AHB Bus)
(1)
4K
(1) The letter "M" refers to the Master Subsystem.
(2) The letter "C" refers to the Control Subsystem.
18 Device Overview Copyright © 2012–2014, Texas Instruments Incorporated
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