Datasheet

M3 SYSTEM BUS
C28 CPU BUS
MTOC
MTOC
MTOCIPCACK REG
MTOCIPCFLG REG
MTOCIPCSTS REG
MTOCIPCSET REG
WRDATA
(31:0)
SET(31:0) FLG(31:0)
RDDATA
(31:0)
ACK(31:0) STS(31:0)
MTOC MSG RAM MTOC IPC
CTOM CTOM
CTOMIPCSET REG
CTOMIPCSACK REG
CTOMIPCSTS REG
CTOMIPCSFLG REG
STS(31:0) ACK(31:0)
RDDATA
(31:0)
FLG(31:0) SET(31:0) WRDATA
(31:0)
CTOM MSG RAMCTOM IPC
C28x
CPU
PIE
INTRSSTS(3:0)
M3
CPU
NVIC
CTOM
IPC
INT
(3:0)
STS(3:0)INTRS
ACK REG
STS REG
SET REG 0
0
031
31
31
CTOM_CH31
CTOM_CH30
CTOM_CH29 CTOM_CH2
CTOM_CH1
CTOM_CH0
. . .
. . .
. . .
FLG REG
32 CTOM IPC CHANNELS
SET
FLG
ACK
STS
1 2
3 4
M3
C28
SYNC HANDSHAKE
FOR ONE OF 32
MTOC CHANNELS
MTOC
IPC
INT
(3:0)
M3
MTOC_CH0
MTOC_CH1
MTOC_CH2 MTOC_CH29
MTOC_CH30
MTOC_CH31
SET REG
FLG REG
ACK REG0
0
031
31
31
. . .
. . .
. . .
STS REG
32 MTOC IPC CHANNELS
SET
FLG
ACK
STS
1 2
3 4
C28
SYNC HANDSHAKE
FOR ONE OF 32
MTOC CHANNELS
PHYSICALLY THIS IS ONE REGISTER
WITH TWO DIFFERENT NAMES – FLG
FOR THE M3 AND STS FOR THE C28
PHYSICALLY THIS IS ONE REGISTER
WITH TWO DIFFERENT NAMES – FLG
FOR THE C28 AND STS FOR THE M3
F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014 www.ti.com
Figure 7-6. IPC
162 Peripheral Information and Timings Copyright © 2012–2014, Texas Instruments Incorporated
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