Datasheet

RWAIT
1
=
SYSCLK (MHz)
40 (MHz)
F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
www.ti.com SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014
Table 6-23. Master Subsystem – Minimum Required Flash/OTP Wait-States at
Different Frequencies
SYSCLKOUT (MHz) SYSCLKOUT (ns) WAIT-STATE
125 8 3
120 8.33 2
110 9.1 2
100 10 2
90 11.11 2
80 12.5 1
70 14.29 1
60 16.67 1
50 20 1
40 25 0
30 33.33 0
20 50 0
10 100 0
The equation to compute the Flash wait-state in Table 6-23 is as follows:
round up to the next integer, or 1, whichever is larger.
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