Datasheet
F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B
SPRS825C –OCTOBER 2012–REVISED FEBRUARY 2014
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6.4 Clock Frequencies, Requirements, and Characteristics
This section provides the frequencies and timing requirements of the input clocks; PLL lock times;
frequencies of the internal clocks; and the frequency and switching characteristics of the output clock.
6.4.1 Input Clock Frequency and Timing Requirements, PLL Lock Times
Table 6-3 shows the frequency requirements for the input clocks to the F28M36x devices. Table 6-4
shows the crystal equivalent series resistance requirements. Table 6-5, Table 6-6, Table 6-7, and Table 6-
8 show the timing requirements for the input clocks to the F28M36x devices. Table 6-9 shows the PLL
lock times for the Main PLL and the USB PLL. The Main PLL operates from the X1 or X1/X2 input clock
pins, and the USB PLL operates from the XCLKIN input clock pin.
Table 6-3. Input Clock Frequency
MIN MAX UNIT
f
(OSC)
Frequency, X1/X2, from external crystal or resonator 2 20 MHz
f
(OCI)
Frequency, X1, from external oscillator (PLL enabled) 2 30 MHz
f
(OCI)
Frequency, X1, from external oscillator (PLL disabled) 2 100 MHz
f
(XCI)
Frequency, XCLKIN, from external oscillator 2 60 MHz
Table 6-4. Crystal Equivalent Series Resistance (ESR) Requirements
(1)
MAXIMUM ESR (Ω) MAXIMUM ESR (Ω)
CRYSTAL FREQUENCY (MHz)
(CL1/2 = 12 pF) (CL1/2 = 24 pF)
2 175 375
4 100 195
6 75 145
8 65 120
10 55 110
12 50 95
14 50 90
16 45 75
18 45 65
20 45 50
(1) Crystal shunt capacitance (C0) should be less than or equal to 7 pF.
Table 6-5. X1 Timing Requirements - PLL Enabled
(1)
MIN MAX UNIT
t
f(OCI)
Fall time, X1 6 ns
t
r(OCI)
Rise time, X1 6 ns
t
w(OCL)
Pulse duration, X1 low as a percentage of t
c(OCI)
45 55 %
t
w(OCH)
Pulse duration, X1 high as a percentage of t
c(OCI)
45 55 %
(1) The possible Main PLL configuration modes are shown in Table 3-20 to Table 3-23.
Table 6-6. X1 Timing Requirements - PLL Disabled
MIN MAX UNIT
t
f(OCI)
Fall time, X1 Up to 20 MHz 6 ns
20 MHz to 100 MHz 2
t
r(OCI)
Rise time, X1 Up to 20 MHz 6 ns
20 MHz to 100 MHz 2
t
w(OCL)
Pulse duration, X1 low as a percentage of t
c(OCI)
45 55 %
t
w(OCH)
Pulse duration, X1 high as a percentage of t
c(OCI)
45 55 %
132 Electrical Specifications Copyright © 2012–2014, Texas Instruments Incorporated
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