Datasheet
www.ti.com
ELECTRICAL CHARACTERISTICS
TMDS442
SLLS757A – AUGUST 2006 – REVISED MARCH 2007
RECOMMENDED OPERATING CONDITIONS (continued)
MIN NOM MAX UNIT
V
IL
LVTTL Low-level input voltage GND 0.8 V
CONTROL PINS (OVS)
V
IH
LVTTL High-level input voltage 3 3.6 V
V
IL
LVTTL Low-level input voltage -0.5 0.5 V
STATUS PINS (HPD_SINK, 5V_PWR)
V
IH
High-level input voltage 2 5.3 V
V
IL
Low-level input voltage GND 0.8 V
DDC I/O PINS (SCL_SINK, SDA_SINK)
V
IH
High-level input voltage 0.7V
CC
5.5 V
V
IL
Low-level input voltage -0.5 0.3V
CC
V
V
ILC
Low-level input voltage contention
(1)
-0.5 0.4 V
DDC I/O PINS (SCL, SDA)
V
IH
High-level input voltage 2.1 5.5 V
V
IL
Low-level input voltage -0.5 1.5 V
LOCAL I
2
C PINS (LC_SCL, LC_SDA)
V
IH
High-level input voltage 0.7V
CC
V
CC
V
V
IL
Low-level input voltage -0.5 0.3V
CC
V
(1) V
IL
specification is for the first low level seen by the SCL_SINK/SDA_SINK lines. V
ILC
is for the second and subsequent low levels seen
by the SCL_SINK/SDA_SINK lines.
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
IH
= V
CC
, V
IL
= V
CC
– 0.4 V, R
T
= 50 Ω ,
AV
CC
= 3.3 V,
I
CC
Supply current 250 412
(2)
mA
Ai/Bi(2:4) = 1.65-Gbps HDMI data pattern,
Ai/Bi(1) = 165-MHz Pixel clock
V
IH
= V
CC
, V
IL
= V
CC
– 0.4 V, R
T
= 50 Ω ,
AV
CC
= 3.3 V,
P
D
Power dissipation 640 1344
(2)
mW
Ai/Bi(2:4) = 1.65-Gbps HDMI data pattern,
Ai/Bi(1) = 165-MHz Pixel clock
TMDS DIFFERENTIAL PINS (A/B, Y/Z)
V
OH
Single-ended high-level output voltage AV
CC
– 10 AV
CC
+10 mV
V
OL
Single-ended low-level output voltage AV
CC
– 600 AV
CC
– 400 mV
V
swing
Single-ended output swing voltage 400 600 mV
See Figure 4 , AV
CC
= 3.3 V,
V
OD(O)
Overshoot of output differential voltage 15% 2 × V
swing
R
T
= 50 Ω
V
OD(U)
Undershoot of output differential voltage 25% 2 × V
swing
Change in steady-state common-mode
Δ V
OC(SS)
5 mV
output voltage between logic states
0 V ≤ V
CC
≤ 1.5 V,
I
(O)OFF
Single-ended standby output current – 10 10 µA
AV
CC
= 3.3 V, R
T
= 50 Ω
V
OD(pp)
Peak-to-peak output differential voltage 800 1200
See Figure 5 , PRE = High,
mVp-p
Steady state output differential voltage
AV
CC
= 3.3 V, R
T
= 50 Ω
V
ODE(SS)
560 840
with de-emphasis
PRE = Low -12 12
I
(OS)
Short circuit output current See Figure 6 mA
PRE = High -15 15
Single-ended input voltage under high
V
I(open)
I
I
= 10 µA V
CC
– 10 V
CC
+10 mV
impedance input or open input
R
INT
Input termination resistance V
IN
= 2.9 V 45 50 55 Ω
STATUS PINS (HPD_SINK, 5V_PWR)
(1) All typical values are at 25 ° C and with a 3.3-V supply.
(2) The maximum rating is characterized under 3.6 V V
CC
.
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