Datasheet

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Thermal Dissipation
TMDS442
SLLS757A – AUGUST 2006 – REVISED MARCH 2007
High-K board – It is always recommended to solder the PowerPAD™ onto the thermal land. A thermal land is the
area of solder-tinned-copper underneath the PowerPAD package. Thermal simulation shows the θ JA of the
TMDS442 is 23.2 ° C/W on a high-K board with a 4 x 4 thermal via array, or is 29.4 ° C/W under the same condition
without a via array. The maximum junction temperature is 103 ° C with via arrays and 112 ° C without via arrays
when the maximum power dissipation from the device is 1.43W. The maximum recommended junction
temperature is 125 ° C, allowing the TMDS442 to operate over the full temperature range (0 ° C - 70 ° C) when the
PowerPAD is soldered onto the thermal land.
Low-K board – Simulation also shows the θ JA of the TMDS442 is 46.9 ° C/W on a low-K board with the
PowerPAD soldered and no thermal vias. To ensure the maximum junction temperature does not exceed 125 ° C
with a worst case power dissipation from the device of 1.43W, the ambient temperature needs to be lower than
58 ° C, when the device is placed on a low-K board.
A general PCB design guide to PowerPAD package is provided in slma002 - PowerPAD Thermally Enhanced
Package.
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Product Folder Link(s): TMDS442