Datasheet

www.ti.com
TIMING CHARACTERISTICS FOR LOCAL I
2
C INTERFACE (LC_SCL, LC_SDA, LC_AO, LC_A1)
TMDS442
SLLS757A – AUGUST 2006 – REVISED MARCH 2007
STANDARD MODE FAST MODE
PARAMETER UNIT
MIN MAX MIN MAX
f
SCL
Clock frequency, SCL 100 400 kHz
t
w(L)
Clock low period, SCL low 4.7 1.3 μ s
t
w(H)
Clock high period, SCL high 4 0.6 μ s
t
r
Rise time, SCL and SDA 1000 300 μ s
t
f
Fall time, SCL and SDA 300 300 μ s
t
su(1)
Setup time, SDA to SCL 250 100 μ s
t
h(1)
Hold time, SCL to SDA 0 0 μ s
t
(buf)
BUS Free time between a STOP and START condition 4.7 1.3 μ s
t
su(2)
Setup time, SCL to start condition 4.7 0.6 μ s
t
h(2)
Hold time, start condition to SCL 4 0.6 μ s
t
su(3)
Setup time, SCL to stop condition 4 0.6 μ s
C
b
(1)
Capacitive load for each bus line 400 400 pF
(1) C
b
is the total capacitance of one bus line in pF.
Copyright © 2006 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TMDS442