Datasheet

Acknowledge
(FromReceiver)
Start
Condition
Acknowledge
(Receiver)
Acknowledge
(Receiver)
SDA
Stop
Condition
I CDevice Addressand
Read/WriteBit
2
FirstDataByte
Other
DataBytes
LastDataByte
A6
ACK
A5 A1 A0 R/W D7 D6 D1 D0
ACK
D7 D6 D1 D0
ACK
T0397-01
S Slave Address
R A
Data
A
Data
A
P
Receiver
Transmitter
A =No Acknowledge(SDA High)
A = Acknowledge
S=StartCondition
P =StopCondition
W=Write
R=Read
R0008-01
Start
Condition
SDA
Acknowledge
(FromReceiver)
Acknowledge
(From Transmitter)
Not Acknowledge
(Transmitter)
Stop
Condition
LastDataByte
I CDevice Addressand
Read/WriteBit
2
FirstData
Byte
Other
DataBytes
A6 A0
ACK
R/W D7
D0
ACK
D7 D6 D1 D0
ACK
T0398-01
TMDS361B
www.ti.com SLLS988A –SEPTEMBER 2009– REVISED JULY 2011
Figure 53. Multiple-Byte Write Transfer
Figure 54. I
2
C Read Cycle
Figure 55. Multiple-Byte Read Transfer
Slave Address
Both SDA and SCL must be connected to a positive supply voltage via pullup resistors. These resistors should
comply with the I
2
C specification that ranges from 2 kΩ to 19 kΩ. When the bus is free, both lines are high. The
address byte is the first byte received following the START condition from the master device. The 7-bit address is
factory preset to 0101 100. Table 7 lists the calls to which the TMDS361B responds.
Table 7. TMDS361B Slave Address
FIXED ADDRESS READ/WRITE BIT
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (R/W)
0 1 0 1 1 0 0 1/0
EXAMPLE – WRITING TO THE TMDS361B
The proper way to write to the TMDS361B is illustrated as follows:
An I
2
C master initiates a write operation to the TMDS361B by generating a start condition (S) followed by the
TMDS361B I
2
C address (as shown following, in MSB-first bit order, followed by a 0 to indicate a write cycle. After
receiving an acknowledge from the TMDS361B, the master presents the subaddress (sink port) to be written,
consisting of one byte of data, MSB-first. The TMDS361B acknowledges the byte after completion of the transfer.
Finally, the master presents the data to be written to the register (sink port), and the TMDS361B acknowledges
the byte. The master can continue presenting data to be written after the TMDS361B acknowledges the previous
byte (steps 6, 7). After the last byte to be written has been acknowledged by the TMDS361B, the I
2
C master then
terminates the write operation by generating a stop condition (P).
Step 1 0
I
2
C start (master) S
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