Datasheet

PULSE
GENRATOR
R
T
V
IN
D.U.T.
V
OUT
C =100pF
L
R =2k
L
W
5V
V
CC
S0369-01
PULSE
GENRATOR
R
T
V
IN
D.U.T.
V
OUT
C =400pF
L
R =2k
L
W
5V
V
CC
S0370-01
TMDS361B
www.ti.com SLLS988A –SEPTEMBER 2009– REVISED JULY 2011
SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH1
Propagation delay time, low to high Source to sink 80 251 ns
t
PHL1
Propagation delay time, high to low Source to sink 35 200 ns
t
PLH2
Propagation delay time, low to high Sink to source 204 459 ns
t
PHL2
Propagation delay time, high to low Sink to source 35 200 ns
t
f1
Output signal fall time Sink side 20 72 ns
t
f2
Output-signal fall time Source side 20 72 ns
f
SCL
SCL clock frequency for internal register Local I
2
C 100 kHz
t
W(L)
Clock LOW period for I
2
C register Local I
2
C 4.7 μs
t
W(H)
Clock HIGH period for internal register Local I
2
C 4 μs
t
SU1
Internal register setup time, SDA to SCL Local I
2
C 250 ns
t
h(1)
*1
Internal register hold time, SCL to SDA Local I
2
C 0 μs
t
(buf)
Internal register bus free time between STOP and START Local I
2
C 4.7 μs
t
su(2)
Internal register setup time, SCL to START Local I
2
C 4.7 μs
t
h(2)
Internal register hold time, START to SCL Local I
2
C 4 μs
t
su(3)
Internal register hold time, SCL to STOP Local I
2
C 4 μs
Figure 4. Sink-Side Test Circuit
Figure 5. Source-Side Test Circuit
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