Datasheet
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ELECTRICAL CHARACTERISTICS
TMDS341A
SLLS702B – MAY 2006 – REVISED MARCH 2007
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
IH
= V
CC
, V
IL
= V
CC
– 0.4 V, R
VSADJ
= 4.64 k Ω ,
R
T
= 50 Ω , AV
CC
= 3.3 V
I
CC
Supply current 190 230 mA
Am/Bm = 1.65 Gbps HDMI data pattern, m = 2, 3, 4
A1/B1 = 165 MHz clock
V
IH
= V
CC
, V
IL
= V
CC
– 0.4 V, R
VSADJ
= 4.64 k Ω ,
R
T
= 50 Ω , AV
CC
= 3.3 V
P
D
Power dissipation 394 657 mW
Am/Bm = 1.65 Gbps HDMI data pattern, m = 2, 3, 4
A1/B1 = 165 MHz clock
TMDS DIFFERENTIAL PINS (A/B; Y/Z)
V
OH
Single-ended high-level output voltage AV
CC
–10 AV
CC
+10 mV
V
OL
Single-ended low-level output voltage AV
CC
–600 AV
CC
–400 mV
V
swing
Single-ended output swing voltage 400 600 mV
See Figure 2 , AV
CC
= 3.3 V,
V
OD(O)
Overshoot of output differential voltage 6% 15% 2 × V
swing
R
T
= 50 Ω , PRE = 0 V
V
OD(U)
Undershoot of output differential voltage 12% 25% 2 × V
swing
Change in steady-state common-mode
∆ V
OC(SS)
0.5 5 mV
output voltage between logic states
0 V ≤ V
CC
≤ 1.5 V,
I
(O)OFF
Single-ended standby output current –10 10 µA
AV
CC
= 3.3 V, R
T
= 50 Ω
|I
(OS)
| Short circuit output current See Figure 3 12 mA
Steady state output differential voltage with
See Figure 4 , PRE = V
CC
,
V
ODE(SS)
560 840 mVp-p
de-emphasis
Am/Bm = 250 Mbps HDMI data pattern, m = 2, 3, 4
A1/B1 = 25 MHz clock
V
ODE(pp)
Peak-to-peak output differential voltage 800 1200 mVp-p
Single-ended input voltage under high
V
I(open)
I
I
= 10 µA V
CC
–10 V
CC
+10 mV
impedance input or open input
R
INT
Input termination resistance V
IN
= 2.9 V 45 50 55 Ω
DDC I/O PINS (SCL, SCL_SINK, SDA, SDA_SINK)
|I
lkg
| Input leakage current V
I
= 0.1 V
CC
to 0.9 V
CC
to isolated DDC ports 0.1 2 µA
C
IO
Input/output capacitance V
I
= 0 V 7.5 pF
R
ON
Switch resistance I
O
= 3 mA, V
O
= 0.4 V 25 50 Ω
V
PASS
Switch output voltage V
I
= 3.3 V, I
O
= 100 µA 1.5
(2)
2.0 2.5
(3)
V
STATUS PINS (HPD)
V
OH(TTL)
TTL High-level output voltage I
OH
= –8 mA 2.4 V
V
OL(TTL)
TTL Low-level output voltage I
OL
= 8 mA 0.4 V
CONTROL PINS (PRE, S, OE)
|I
IH
| High-level digital input current V
IH
= 2 V or V
CC
0.1 2 µA
|I
IL
| Low-level digital input current V
IL
= GND or 0.8 V 0.1 2 µA
STATUS PINS (HPD_SINK)
V
IH
= 5.3 V 23 100
|I
IH
| High-level digital input current µA
V
IH
= 2 V or V
CC
0.1 2
|I
IL
| Low-level digital input current V
IL
= GND or 0.8 V 0.1 2 µA
(1) All typical values are at 25 ° C and with a 3.3-V supply.
(2) The value is tested in full temperature range at 3.0 V.
(3) The value is tested in full temperature range at 3.6 V.
8
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