Datasheet

TMDS141
SLLS737D –JUNE 2006–REVISED SEPTEMBER 2011 www.ti.com
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
V
CC
Supply voltage 3 3.3 3.6 V
T
A
Operating free-air temperature 0 70 °C
TMDS DIFFERENTIAL PINS (RX/ RXC)
V
IC
Input common mode voltage V
CC
–400 V
CC
+10 mV
V
ID
Receiver peak-to-peak differential input voltage 150 1560 mVp-p
R
VSADJ
Resistor for TMDS compliant voltage swing range 4.6 4.64 4.68 kΩ
AV
CC
TMDS Output termination voltage, see Figure 2 3 3.3 3.6 V
R
T
Termination resistance, see Figure 2 45 50 55 Ω
Signaling rate 0 2.25 Gbps
CONTROL PINS (PRE, OE, I2CEN)
V
IH
LVTTL High-level input voltage 2 V
CC
V
V
IL
LVTTL Low-level input voltage GND 0.8 V
CONTROL PINS (OVS)
V
IH
LVTTL High-level input voltage 3 3.6 V
V
IL
LVTTL Low-level input voltage -0.5 0.5 V
I
2
C PINS (TSCL, TSDA)
V
IH
High-level input voltage 0.7V
CC
5.5 V
V
IL
Low-level input voltage -0.5 0.3V
CC
V
V
ICL
Low-level input voltage contention
(1)
-0.5 0.4 V
I
2
C PINS (RSCL, RSDA)
V
IH
High-level input voltage 2.1 5.5 V
V
IL
Low-level input voltage -0.5 1.5 V
(1) V
IL
specification is for the first low level seen by the SCL/SDA lines. V
ICL
is for the second and subsequent low levels seen by the
TSCL/TSDA lines.
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