Datasheet


      
SLAS326A − JANUARY 2001 − REVISED MARCH 2004
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
†
Supply voltage, AV
DD
, DV
DD
, DIV
DD
−0.3 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog input voltage range −0.3 V to AV
DD
+0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range −0.3 V to DV
DD
+0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating
virtual junction temperature range, T
J
−40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
−20°C to 75°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
power supplies
MIN NOM MAX UNIT
Analog supply voltage AV
DD
2.7 3 3.3 V
Digital supply voltage DV
DD
2.7 3 3.3 V
Digital interface supply voltage DIV
DD
1.8 4.4 V
digital inputs, DIV
DD
= 3 V, DV
DD
= 3 V
MIN NOM MAX UNIT
High-level input voltage, V
IH
0.8DIV
DD
V
Low-level input voltage, V
IL
0.2DIV
DD
V
Input ADCCLK frequency 40 MHz
ADCCLK pulse duration, clock high, t
w(MCLKH)
12.5 ns
ADCCLK pulse duration, clock low, t
w(MCLKL)
12.5 ns
Input SCLK frequency 40 MHz
SCLK pulse duration, clock high, t
w(SCLKH)
12.5 ns
SCLK pulse duration, clock low, t
w(SCLKL)
12.5 ns