Datasheet


      
SLAS326A − JANUARY 2001 − REVISED MARCH 2004
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGE DEVICE
T
A
TQFP
(PFB)
−20°C to 75°C TLV990-40PFB
functional block diagram
Σ
10-Bit
ADC
PGA
8-Bit
CDAC
Offset
Register
PGA
Regulator
10
Σ
8-Bit
FDAC
Offset
Register
INT. REF.
Optical
Black
Pixel Limits
Digital
Averager/
Filter
Three
State
Latch
Timing
and
Control
Logic
Serial
Port
DAC
REG
8-Bit
DAC
DAC
REG
8-Bit
DAC
Clamp
1.2 V REF
CCDIN
DACO1
DACO2
CLCCD CLREF
AVDD1−5
RPD RBD RMD
OE
D0
D9
RESET
CLK
SV
SR
BLKG
OBCLP
STBY
CS
SCLK
SDIN
DIGNDDGND
AGND1−5
VSS
SCKP
CDS/
MUX
DV
DD
DIV
DD