Datasheet

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      
SLAS326A − JANUARY 2001 − REVISED MARCH 2004
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
REGISTER DEFINITION
PGA register format
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default PGA gain = 0000000000 or 0 dB
user DAC1 and DAC2 registers format
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X X Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default user DAC register value = XX00000000
coarse offset DAC register format
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X SIGN Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
coarse offset DAC register description
BIT NAME DESCRIPTION
D9 X Reserved
D8 SIGN Coarse DAC sign bit, 0 = + sign (default), 1 = − sign
D7−D0 Coarse DAC control data when the D6 in the control register is set at 1.
Default coarse DAC register value = X000000000
fine offset DAC register format
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X SIGN Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
fine offset DAC register description
BIT NAME DESCRIPTION
D9 X Reserved
D8 SIGN Fine DAC sign bit, 0 = + sign (default), 1 = − sign
D7−D0 Fine DAC control data when the D5 in the control register is set at 1.
Default fine DAC register value = X000000000
digital Vb (optical black level) register format
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default Vb register value = 40 Hex