Datasheet

TLV717xx
TLV717xxP
SBVS176A –OCTOBER 2011–REVISED APRIL 2012 www.ti.com
DROPOUT VOLTAGE
The TLV717xx uses a PMOS pass transistor to achieve low dropout. When (V
IN
– V
OUT
) is less than the dropout
voltage (V
DO
), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the
R
DS(ON)
of the PMOS pass element. V
DO
scales approximately with output current because the PMOS device
behaves like a resistor in dropout. As with any linear regulator, PSRR and transient response are degraded as
(V
IN
– V
OUT
) approaches dropout.
TRANSIENT RESPONSE
As with any regulator, increasing the size of the output capacitor reduces over- and undershoot magnitude but
increases the duration of the transient response.
UNDERVOLTAGE LOCKOUT (UVLO)
The TLV717xx uses an undervoltage lockout circuit (UVLO = 1.6 V) to keep the output shut off until the internal
circuitry operates properly.
POWER DISSIPATION
The ability to remove heat from the die is different for each package type, presenting different considerations in
the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves
the heat from the device to ambient air. Performance data for JEDEC-low and high-K boards are given in the
Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device.
The addition, plated through-holes to heat-dissipating layers also improves heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (P
D
) is equal to the product of
the output current and the voltage drop across the output pass element, as shown in Equation 1.
P
D
= (V
IN
– V
OUT
) × I
OUT
(1)
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