Datasheet

t =
(120 R )
(120+R )
L
L
·
·
C
OUT
TLV712xx
www.ti.com SBVS150A –SEPTEMBER 2010–REVISED JANUARY 2011
APPLICATION INFORMATION
GENERAL DESCRIPTION BOARD LAYOUT RECOMMENDATIONS TO
IMPROVE PSRR AND NOISE PERFORMANCE
The TLV712xx belongs to a new family of
next-generation value LDO regulators. These devices Input and output capacitors should be placed as
offer sub-bandgap output voltages; that is, output close to the device pins as possible. To improve ac
voltages from 1.2 V all the way down to 0.7 V. These performance such as PSRR, output noise, and
devices consume low quiescent current and deliver transient response, it is recommended that the board
excellent line and load transient performance. These be designed with separate ground planes for V
IN
and
characteristics, combined with low noise and very V
OUT
, with the ground plane connected only at the
good PSRR with little (V
IN
– V
OUT
) headroom, make GND pin of the device. In addition, the ground
this family of devices ideal for portable RF connection for the output capacitor should be
applications. This family of regulators offers current connected directly to the GND pin of the device. High
limit and thermal protection, and is specified from ESR capacitors may degrade PSRR performance.
–40°C to +125°C.
INTERNAL CURRENT LIMIT
INPUT AND OUTPUT CAPACITOR
The TLV712xx internal current limit helps to protect
REQUIREMENTS
the regulator during fault conditions. During current
1.0-mF X5R- and X7R-type ceramic capacitors are limit, the output sources a fixed amount of current
recommended because these capacitors have that is largely independent of the output voltage. In
minimal variation in value and equivalent series such a case, the output voltage is not regulated, and
resistance (ESR) over temperature. is V
OUT
= I
LIMIT
× R
LOAD
. The PMOS pass transistor
dissipates (V
IN
– V
OUT
) × I
LIMIT
until thermal shutdown
However, the TLV712xx is designed to be stable with
is triggered and the device turns off. As the device
an effective capacitance of 0.1 mF or larger at the
cools, it is turned on by the internal thermal shutdown
output. Thus, the device is stable with capacitors of
circuit. If the fault condition continues, the device
other dielectric types as well, as long as the effective
cycles between current limit and thermal shutdown.
capacitance under operating bias voltage and
See the Thermal Information section for more details.
temperature is greater than 0.1 mF. This effective
capacitance refers to the capacitance that the LDO The PMOS pass element in the TLV712xx has a
sees under operating bias voltage and temperature built-in body diode that conducts current when the
conditions; that is, the capacitance after taking both voltage at OUT exceeds the voltage at IN. This
bias voltage and temperature derating into current is not limited, so if extended reverse voltage
consideration. In addition to allowing the use of operation is anticipated, external limiting to 5% of the
lower-cost dielectrics, this capability of being stable rated output current is recommended.
with 0.1-mF effective capacitance also enables the
use of smaller footprint capacitors that have higher
SHUTDOWN
derating in size- and space-constrained applications.
The enable pin (EN) is active high. The device is
NOTE: Using a 0.1-mF rated capacitor at the output
enabled when voltage at EN pin goes above 0.9 V.
of the LDO does not ensure stability because the
This relatively lower voltage value required to turn on
effective capacitance under the specified operating
the LDO can also be used to power the device when
conditions would be less than 0.1 mF. Maximum ESR
it is connected to a GPIO of a newer processor,
should be less than 200 mΩ.
where the GPIO Logic 1 voltage level is lower than
that of traditional microcontrollers. The device is
Although an input capacitor is not required for
turned off when the EN pin is held at less than 0.4 V.
stability, it is good analog design practice to connect
When shutdown capability is not required, EN can be
a 0.1-mF to 1.0-mF, low ESR capacitor across the IN
connected to the IN pin.
pin and GND pin of the regulator. This capacitor
counteracts reactive input sources and improves
The TLV712xxP version has internal active pull-down
transient response, noise rejection, and ripple
circuitry that discharges the output with a time
rejection. A higher-value capacitor may be necessary
constant of:
if large, fast rise-time load transients are anticipated,
or if the device is not located close to the power
source. If source impedance is more than 2 Ω, a
0.1-mF input capacitor may be necessary to ensure
where:
stability.
• R
L
= Load resistance
• C
OUT
= Output capacitor (1)
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