Datasheet

TLV710 Series
TLV711 Series
www.ti.com SBVS142A –JULY 2010–REVISED AUGUST 2010
DROPOUT VOLTAGE use worst-case loads and signal conditions. For good
reliability, thermal protection should trigger at least
The TLV710 and TLV711 use a PMOS pass
+35°C above the maximum expected ambient
transistor to achieve low dropout. When (V
IN
– V
OUT
)
condition of the particular application. This
is less than the dropout voltage (V
DO
), the PMOS
configuration produces a worst-case junction
pass device is in the linear region of operation and
temperature of +125°C at the highest expected
the input-to-output resistance is the R
DS(ON)
of the
ambient temperature and worst-case load.
PMOS pass element. V
DO
scales approximately with
the output current because the PMOS device The internal protection circuitry of the TLV710 and
behaves as a resistor in dropout. TLV711 has been designed to protect against
overload conditions. It was not intended to replace
As with any linear regulator, PSRR and transient
proper heatsinking. Continuously running the
response are degraded as (V
IN
– V
OUT
) approaches
TLV710/ TLV711 into thermal shutdown degrades
dropout.
device reliability.
TRANSIENT RESPONSE
POWER DISSIPATION
As with any regulator, increasing the size of the
The ability to remove heat from a die is different for
output capacitor reduces over/undershoot magnitude
each package type, presenting different
but increases duration of the transient response.
considerations in the printed circuit board (PCB)
layout. The PCB area around the device that is free
The TLV710 and TLV711 each have a dedicated
of other components moves the heat from the device
V
REF
. Consequently, crosstalk from one channel to
to the ambient air.
the other as a result of transients is close to 0V.
Performance data for the TLV710 evaluation module
UNDERVOLTAGE LOCKOUT (UVLO)
(EVM) are shown in Table 1. The EVM is a 2-layer
board with 2 ounces of copper per side. The
The TLV710 and TLV711 use an undervoltage
dimension and layout are shown in Figure 70 and
lockout circuit to keep the output shut off until the
Figure 71. Using heavier copper increases the
internal circuitry is operating properly.
effectiveness of removing heat from the device. The
addition of plated through-holes in the
THERMAL INFORMATION
heat-dissipating layer also improves the heatsink
Thermal protection disables the output when the
effectiveness. Power dissipation depends on input
junction temperature rises to approximately +165°C,
voltage and load conditions.
allowing the device to cool. When the junction
Power dissipation (P
D
) is equal to the product of the
temperature cools to approximately +145°C, the
output current and the voltage drop across the output
output circuitry is again enabled. Depending on power
pass element, as shown in Equation 2:
dissipation, thermal resistance, and ambient
P
D
= (V
IN
– V
OUT
) × I
OUT
(2)
temperature, the thermal protection circuit may cycle
on and off. This cycling limits the dissipation of the
regulator, protecting it from damage as a result of PACKAGE MOUNTING
overheating.
Solder pad footprint recommendations for the TLV710
Any tendency to activate the thermal protection circuit and TLV711 are available from the Texas Instruments
indicates excessive power dissipation or an Web site at www.ti.com. The recommended land
inadequate heatsink. For reliable operation, junction pattern for the DSE (SON-6) package is shown in
temperature should be limited to +125°C maximum. Figure 72.
To estimate the margin of safety in a complete design
(including heatsink), increase the ambient
temperature until the thermal protection is triggered;
Table 1. TLV710 EVM Dissipation Ratings
PACKAGE R
qJA
T
A
< +25°C T
A
= +70°C T
A
= +85°C
DSE 170°C/W 585mW 320mW 235mW
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