Datasheet

t =
120·R
L
120+R
L
·C
OUT
TLV710 Series
TLV711 Series
SBVS142A –JULY 2010–REVISED AUGUST 2010 www.ti.com
APPLICATION INFORMATION
The TLV710 and TLV711 series of devices belong to
BOARD LAYOUT RECOMMENDATIONS TO
a new family of next generation, value LDO
IMPROVE PSRR AND NOISE PERFORMANCE
regulators. These devices consume low quiescent
current and deliver excellent line and load transient
Input and output capacitors should be placed as
performance. These features, combined with low
close to the device pins as possible. To improve ac
noise, very good PSRR with little (V
IN
to V
OUT
)
performance such as PSRR, output noise, and
headroom, make these devices ideal for RF portable
transient response, it is recommended that the board
applications. This family of LDO regulators offers
be designed with separate ground planes for V
IN
and
current limit and thermal protection, and is specified
V
OUT
, with the ground plane connected only at the
from –40°C to +125°C.
GND pin of the device. In addition, the ground
connection for the output capacitor should be
INPUT AND OUTPUT CAPACITOR connected directly to the GND pin of the device. High
REQUIREMENTS ESR capacitors may degrade PSRR.
1.0mF X5R- and X7R-type ceramic capacitors are
INTERNAL CURRENT LIMIT
recommended because they have minimal variation
in value and equivalent series resistance (ESR) over
The TLV710 and TLV711 internal current limits help
temperature.
protect the regulator during fault conditions. During
current limit, the output sources a fixed amount of
However, the TLV710 and TLV711 are designed to
current that is largely independent of output voltage.
be stable with an effective capacitance of 0.1mF or
In such a case, the output voltage is not regulated,
larger at the output. Thus, the device would also be
and is V
OUT
= I
LIMIT
× R
LOAD
.
stable with capacitors of other dielectrics, as long as
the effective capacitance under operating bias
The PMOS pass transistor dissipates (V
IN
– V
OUT
) ×
voltage and temperature is greater than 0.1mF. This
I
LIMIT
until thermal shutdown is triggered and the
effective capacitance refers to the capacitance that
device is turned off. As the device cools down, it is
the device sees under operating bias voltage and
turned on by the internal thermal shutdown circuit. If
temperature conditions (that is, the capacitance after
the fault condition continues, the device cycles
taking bias voltage and temperature derating into
between current limit and thermal shutdown. See the
consideration.)
Thermal Information section for more details. The
PMOS pass element in the TLV710 and TLV711 has
In addition to allowing the use of cost-effective
a built-in body diode that conducts current when the
dielectrics, these devices also enable using smaller
voltage at OUT exceeds the voltage at IN. This
footprint capacitors that have a higher derating in
current is not limited, so if extended reverse voltage
size-constrained applications.
operation is anticipated, external limiting to 5% of
Note that using a 0.1mF rating capacitor at the output rated output current is recommended.
of the LDO regulator does not ensure stability
because the effective capacitance under operating
SHUTDOWN
conditions would be less than 0.1mF. The maximum
The enable pin (EN) is active high. The device is
ESR should be less than 200mΩ.
enabled when EN pin goes above 0.9V. This
Although an input capacitor is not required for
relatively lower value of voltage needed to turn the
stability, it is good analog design practice to connect
LDO regulator on can be used to enable the device
a 0.1mF to 1.0mF low ESR capacitor across the IN
with the GPIO of recent processors whose GPIO
and GND pins of the regulator. This capacitor
voltage is lower than traditional microcontrollers.
counteracts reactive input sources and improves
The device is turned off when the EN pin is held at
transient response, noise rejection, and ripple
less than 0.4V. When shutdown capability is not
rejection. A higher-value capacitor may be necessary
required, the EN pin can connected to the IN pin.
if large, fast-rise-time load transients are anticipated,
or if the device is not located near the power source.
The TLV711 has internal pull-down circuitry that
If source impedance is more than 2Ω, a 0.1mF input
discharges output with a time constant of:
capacitor may be necessary to ensure stability.
Where:
R
L
= load resistance
C
OUT
= output capacitor (1)
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