Datasheet
P =(V V ) I- ´
D IN OUT OUT
TLV707 Series
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SBVS153C –FEBRUARY 2011–REVISED NOVEMBER 2012
DROPOUT VOLTAGE To estimate the margin of safety in a complete design
(including heatsink), increase the ambient
The TLV707 uses a PMOS pass transistor to achieve
temperature until the thermal protection is triggered;
low dropout. When (V
IN
– V
OUT
) is less than the
use worst-case loads and signal conditions.
dropout voltage (V
DO
), the PMOS pass device is in
the linear region of operation and the input-to-output For good reliability, thermal protection should trigger
resistance is the R
DS(ON)
of the PMOS pass element. at least +35°C above the maximum expected ambient
V
DO
scales approximately with output current condition of the particular application. This
because the PMOS device behaves as a resistor in configuration produces a worst-case junction
dropout. temperature of +125°C at the highest expected
ambient temperature and worst-case load.
As with any linear regulator, PSRR and transient
response are degraded as (V
IN
– V
OUT
) approaches The internal protection circuitry of the TLV707 has
dropout. This effect is shown in Figure 14 in the been designed to protect against overload conditions.
Typical Characteristics section. It was not intended to replace proper heatsinking.
Continuously running the TLV707 into thermal
shutdown degrades device reliability.
TRANSIENT RESPONSE
As with any regulator, increasing the size of the
POWER DISSIPATION
output capacitor reduces over-/undershoot magnitude
but increases the duration of the transient response. The ability to remove heat from the die is different for
each package type, presenting different
considerations in the printed circuit board (PCB)
UNDERVOLTAGE LOCKOUT (UVLO)
layout. The PCB area around the device that is free
The TLV707 uses an undervoltage lockout circuit to
of other components moves the heat from the device
keep the output shut off until internal circuitry is
to the ambient air.
operating properly.
Performance data for JEDEC low- and high-K boards
are given in the Dissipation Ratings. Using heavier
THERMAL INFORMATION
copper increases the effectiveness in removing heat
Thermal protection disables the output when the
from the device. The addition of plated through-holes
junction temperature rises to approximately +160°C,
to heat-dissipating layers also improves heatsink
allowing the device to cool. When the junction
effectiveness.
temperature cools to approximately +140°C, the
Power dissipation depends on input voltage and load
output circuitry is again enabled. Depending on power
conditions. Power dissipation (P
D
) is equal to the
dissipation, thermal resistance, and ambient
product of the output current and the voltage drop
temperature, the thermal protection circuit may cycle
across the output pass element, as shown in
on and off. This cycling limits the dissipation of the
Equation 2.
regulator, protecting it from damage as a result of
overheating.
(2)
Any tendency to activate the thermal protection circuit
PACKAGE MOUNTING
indicates excessive power dissipation or an
inadequate heatsink. For reliable operation, junction
Solder pad footprint recommendations for the TLV707
temperature should be limited to +125°C maximum.
are available from the Texas Instruments web site at
www.ti.com. The recommended land pattern for the
DQN (DFN-4) package is shown towards the end of
this data sheet.
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