Datasheet

TLV705
TLV705P
SBVS151C –DECEMBER 2010–REVISED OCTOBER 2012 www.ti.com
If the output capacitor and load are increased such dissipation, thermal resistance, and ambient
that the soft-start current exceeds the output current temperature, the thermal protection circuit may cycle
limit, it is clamped at the typical current limit of on and off. This cycling limits the dissipation of the
400 mA. For example, if C
OUT
= 10 μF and I
OUT
= regulator, protecting it from damage as a result of
200 mA, then 10 μF × 0.06 V/μs + 200 mA = 800 mA overheating.
is not supplied. Instead, it is clamped at 400 mA.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an
SHUTDOWN
inadequate heatsink. For reliable operation, junction
temperature should be limited to +125°C, maximum.
The enable pin (EN) is active high. The device is
To estimate the margin of safety in a complete design
enabled when the EN pin goes above 0.9 V. This
(including heatsink), increase the ambient
relatively lower value of voltage required to turn the
temperature until the thermal protection is triggered;
LDO on can be used to power the device with the
use worst-case loads and signal conditions. For good
GPIO of recent processors with a GPIO voltage lower
reliability, thermal protection should trigger at least
than traditional microcontrollers. The device is turned
+35°C above the maximum expected ambient
off when the EN pin is held at less than 0.4 V. When
condition of the particular application. This
shutdown capability is not required, EN can be
configuration produces a worst-case junction
connected to the V
IN
pin. The TLV705P version has
temperature of +125°C at the highest expected
internal active pull-down circuitry that discharges the
ambient temperature and worst-case load.
output with a time constant of:
τ = (120 × R
L
)/(120 + R
L
) × C
OUT
The internal protection circuitry of the TLV705 is been
designed to protect against overload conditions. It is
Where:
not intended to replace proper heatsinking.
R
L
= load resistance, C
OUT
= output capacitor (2)
Continuously running the TLV705 into thermal
shutdown degrades device reliability.
DROPOUT VOLTAGE
POWER DISSIPATION
The TLV705 uses a PMOS pass transistor to achieve
low dropout. When (V
IN
– V
OUT
) is less than the
The ability to remove heat from the die is different for
dropout voltage (V
DO
), the PMOS pass device is in
each package type, presenting different
the linear region of operation and the input-to-output
considerations in the printed circuit board (PCB)
resistance is the R
DS(ON)
of the PMOS pass element.
layout. The PCB area around the device that is free
V
DO
approximately scales with the output current
of other components moves the heat from the device
because the PMOS device behaves as a resistor in
to the ambient air. Performance data for JEDEC low
dropout.
and high-K boards are given in the Thermal
Information table. Using heavier copper increases the
As with any linear regulator, PSRR and transient
effectiveness in removing heat from the device. The
response are degraded as (V
IN
– V
OUT
) approaches
addition of plated through-holes to heat-dissipating
dropout. This effect is shown in Figure 15 in the
layers also improves the heatsink effectiveness.
Typical Characteristics.
Refer to Table 2 for thermal performance on the
TRANSIENT RESPONSE
TLV705 evaluation module (EVM). The EVM is a two-
layer board with two ounces of copper per side.
As with any regulator, increasing the size of the
Dimensions and layout of the board are illustrated in
output capacitor reduces over/undershoot magnitude,
Figure 28 and Figure 29, respectively.
but increases the duration of the transient response.
Power dissipation depends on input voltage and load
UNDERVOLTAGE LOCK-OUT (UVLO)
conditions. Power dissipation (P
D
) is equal to the
product of the output current and the voltage drop
The TLV705 uses an undervoltage lockout (UVLO)
across the output pass element, as shown in
circuit to keep the output shut off until the internal
Equation 3:
circuitry is operating properly.
P
D
= (V
IN
– V
OUT
) × I
OUT
(3)
THERMAL INFORMATION
Thermal protection disables the output when the
junction temperature rises to approximately +165°C,
allowing the device to cool. When the junction
temperature cools to approximately +145°C, the
output circuitry is again enabled. Depending on power
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