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User's Guide

SLAU416A–January 2012–Revised July 2013

TLV62130EVM-505 and TLV62150EVM-505 Evaluation

Modules

This user’s guide describes the characteristics, operation, and use of the Texas Instruments TLV62130

and TLV62150 evaluation modules (EVM). The TLV62130EVM-505 and TLV62150EVM-505 evaluate the

performance of the TLV62130 or TLV62150 IC in a standard buck regulator topology. The EVM converts

a 4-V to 17-V input voltage to 3.3 V and provides up to 3 A (1 A for the TLV62150EVM-505) of output

current. The user’s guide includes setup instructions for the EVM, the printed-circuit board layout, the

schematic diagram, the bill of materials, and test results for the EVM. After the release of the A-version

devices in the summer of 2013, these EVMs are assembled with the TLV62130A or TLV62150A.

Contents

1 Introduction .................................................................................................................. 2

2 Setup ......................................................................................................................... 3

3 TLV621x0EVM-505 Test Results ......................................................................................... 4

4 Board Layout ............................................................................................................... 13

5 Schematic and Bill of Materials .......................................................................................... 16

List of Figures

1 Loop Response Measurement Modification ............................................................................. 3

2 Efficiency With 1-µH Inductor and FSW = LOW (High Frequency) .................................................. 4

3 Efficiency With 2.2-µH Inductor and FSW = LOW (High Frequency) ................................................ 5

4 Efficiency With 2.2-µH Inductor and FSW = HIGH (Low Frequency) ................................................ 5

5 Load Regulation With 2.2-µH Inductor and FSW = LOW (High Frequency)........................................ 6

6 Line Regulation With 2.2-µH Inductor and FSW = LOW (High Frequency) and I

OUT

= 1 A ....................... 6

7 Loop Response With 2.2-µH Inductor and FSW = LOW (High Frequency) and V

= 12 V and I

OUT

= 1 A ..... 7

8 Input Voltage Ripple With 2.2-µH Inductor and FSW = LOW (High Frequency) and V

= 12 V and I

OUT

1 A ............................................................................................................................ 7

9 Output Voltage Ripple With 2.2-µH Inductor and FSW = LOW (High Frequency) and V

= 12 V and I

OUT

= 1 A .......................................................................................................................... 8

10 Output Voltage Ripple With 2.2-µH Inductor and FSW = HIGH (Low Frequency) and V

= 12 V and I

OUT

= 1 A .......................................................................................................................... 8

11 Load Transient Response With 1-µH Inductor and V

= 12 V........................................................ 9

12 Load Transient Response With 2.2-µH Inductor and V

= 12 V...................................................... 9

13 Start-Up on EN with 1-A Load and V

= 12 V......................................................................... 10

14 Shutdown on EN with 1-A Load and V

= 12 V ....................................................................... 10

15 TLV62130 Prebias Start-Up and Shutdown on EN With 1-A Load and V

= 12 V ............................... 11

16 TLV62130A Prebias Start-Up and Shutdown on EN With 1-A Load and V

= 12 V ............................. 11

17 Thermal Performance With 1-µH Inductor ............................................................................. 12

18 Thermal Performance With 2.2-µH Inductor ........................................................................... 12

19 Assembly Layer............................................................................................................ 13

20 Top Layer Routing......................................................................................................... 13

21 Internal Layer-1 Routing.................................................................................................. 14

22 Internal Layer-2 Routing.................................................................................................. 14

23 Bottom Layer Routing..................................................................................................... 15

SLAU416A–January 2012–Revised July 2013 TLV62130EVM-505 and TLV62150EVM-505 Evaluation Modules

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Summary of content (22 pages)

PAGE 1
User's Guide SLAU416A – January 2012 – Revised July 2013 TLV62130EVM-505 and TLV62150EVM-505 Evaluation Modules This user’s guide describes the characteristics, operation, and use of the Texas Instruments TLV62130 and TLV62150 evaluation modules (EVM). The TLV62130EVM-505 and TLV62150EVM-505 evaluate the performance of the TLV62130 or TLV62150 IC in a standard buck regulator topology. The EVM converts a 4-V to 17-V input voltage to 3.
PAGE 2
Introduction 24 www.ti.com TLV621x0EVM-505 Schematic .......................................................................................... 16 List of Tables 1 1 Performance Specification Summary..................................................................................... 2 2 TLV621x0EVM-505 Bill of Materials ....................................................................................
PAGE 3
Setup www.ti.com 1.3.3 Loop Response Measurement The loop response of the TLV621x0EVM-505 can be measured with two simple changes to the circuitry. First, install a 10-Ω resistor across the pads in the middle of the back of the PCB. The pads are spaced to allow installation of 0805- or 0603-sized resistors. Second, cut the trace between the via on the output voltage and the trace that connects to the VOS pin via. These changes are shown in Figure 1.
PAGE 4
TLV621x0EVM-505 Test Results JP3 – FSW JP4 – PG Pullup Voltage 2.2 www.ti.com FSW pin input jumper. Place the supplied jumper across 1.25 MHz and FSW to operate the IC at a reduced switching frequency of nominally 1.25 MHz. Place the jumper across 2.5 MHz and FSW to operate the IC at the full switching frequency of nominally 2.5 MHz. PG pin pullup voltage jumper. Place the supplied jumper on JP4 to connect the PG pin pullup resistor to Vout.
PAGE 5
TLV621x0EVM-505 Test Results www.ti.com 100 VI = 15 V 90 VI = 12 V VI = 9 V Efficiency - % 80 VI = 5 V 70 VI = 17 V 60 50 40 0.0001 0.001 0.01 0.1 Load Current - A 1 10 Figure 3. Efficiency With 2.2-µH Inductor and FSW = LOW (High Frequency) 100 VI = 9 V 90 VI = 15 V VI = 5 V 80 Efficiency - % VI = 12 V VI = 17 V 70 60 50 40 0.0001 0.001 0.01 0.1 Load Current - A 1 10 Figure 4. Efficiency With 2.
PAGE 6
TLV621x0EVM-505 Test Results www.ti.com 0.6 VI = 17 V 0.5 VI = 15 V VI = 12 V Load Regulation - % 0.4 VI = 9 V 0.3 0.2 0.1 VI = 5 V 0 -0.1 -0.2 0.0001 0.001 0.01 0.1 Load Current - A 1 10 Figure 5. Load Regulation With 2.2-µH Inductor and FSW = LOW (High Frequency) 0.2 Load Regulation - % 0.15 0.1 0.05 0 -0.05 -0.1 4 6 8 10 12 14 16 17 Input Voltage - V Figure 6. Line Regulation With 2.
PAGE 7
Gain - dB 60 180 50 150 40 120 30 90 20 60 10 30 0 0 Phase - deg TLV621x0EVM-505 Test Results www.ti.com -10 -30 -20 -60 -30 -90 -40 -120 -50 -150 -60 100 1k 10k f - Frequency - Hz 100k -180 1M Figure 7. Loop Response With 2.2-µH Inductor and FSW = LOW (High Frequency) and VIN = 12 V and IOUT =1A VIN (AC Coupled) 20 mV/div Iind 0.5 A/div SW 10 V/div t - Time - 200 ns/div Figure 8. Input Voltage Ripple With 2.
PAGE 8
TLV621x0EVM-505 Test Results www.ti.com VOUT (AC Coupled) 20 mV/div Iind 0.5 A/div SW 10 V/div t - Time - 200 ns/div Figure 9. Output Voltage Ripple With 2.2-µH Inductor and FSW = LOW (High Frequency) and VIN = 12 V and IOUT = 1 A VOUT (AC Coupled) 20 mV/div Iind 0.5 A/div SW 10 V/div t - Time - 200 ns/div Figure 10. Output Voltage Ripple With 2.
PAGE 9
TLV621x0EVM-505 Test Results www.ti.com VOUT (AC Coupled) 20 mV/div 1 A to 2 A Load Step ILoad 1 A/div t - Time - 2 ms/div Figure 11. Load Transient Response With 1-µH Inductor and VIN = 12 V VOUT (AC Coupled) 20 mV/div 0.5 A to 1 A Load Step ILoad 0.5 A/div t - Time - 2 ms/div Figure 12. Load Transient Response With 2.
PAGE 10
TLV621x0EVM-505 Test Results www.ti.com VIN 10 V/div EN 10 V/div VOUT 1 V/div SS/TR 1 V/div t - Time - 1 ms/div Figure 13. Start-Up on EN with 1-A Load and VIN = 12 V VIN 10 V/div EN 10 V/div VOUT 1 V/div PG 1 V/div t - Time - 100 ms/div Figure 14.
PAGE 11
TLV621x0EVM-505 Test Results www.ti.com VIN 10 V/div EN 1 V/div 1.5 V Pre-bias VOUT 1 V/div PG 2 V/div t - Time - 500 ms/div Figure 15. TLV62130 Prebias Start-Up and Shutdown on EN With 1-A Load and VIN = 12 V VIN 10 V/div EN 1 V/div 1.5 V Pre-bias VOUT 1 V/div PG 2 V/div t - Time - 500 ms/div Figure 16.
PAGE 12
TLV621x0EVM-505 Test Results www.ti.com VIN = 12 V and IOUT = 3 A and FSW = LOW (high frequency) Figure 17. Thermal Performance With 1-µH Inductor VIN = 12 V and IOUT = 3 A and FSW = HIGH (low frequency) Figure 18. Thermal Performance With 2.
PAGE 13
Board Layout www.ti.com 4 Board Layout This section provides the TLV621x0EVM-505 board layout and illustrations. Figure 19. Assembly Layer Figure 20.
PAGE 14
Board Layout www.ti.com Figure 21. Internal Layer-1 Routing Figure 22.
PAGE 15
Board Layout www.ti.com Figure 23.
PAGE 16
Schematic and Bill of Materials 5 www.ti.com Schematic and Bill of Materials This section provides the TLV621x0EVM-505 schematic and bill of materials. Schematic + 5.1 Figure 24.
PAGE 17
Schematic and Bill of Materials www.ti.com 5.2 Bill of Materials Table 2. TLV621x0EVM-505 Bill of Materials Count -004 -005 RefDes Value Description Size Part Number MFR 1 1 C1 10 µF Capacitor, Ceramic, 25V, X5R, 20% 1210 Std Std 1 1 C3 22 µF Capacitor, Ceramic, 6.3V, X5R, 20% 0805 Std Std 1 1 C5 3300 pF Capacitor, Ceramic, 25V, X7R, 10% 0603 Std Std 1 1 C6 68 µF Capacitor, Tantalum, 35V, 68uF, ±20% 7361[V] TPSV686M035R0150 AVX 1 0 C7 0.
PAGE 18
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
PAGE 19
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
PAGE 20
【Important Notice for Users of EVMs for RF Products in Japan】】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
PAGE 21
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
PAGE 22
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.